High performance interposer for a chip package using...

Details High performance interposer for a chip package using... High performance interposer for a chip package using...

2006-02-07

2006-02-07

Zarroli, Michael C. (Department: 2839)

Electrical connectors

Including elastomeric or nonmetallic conductive portion

Adapted to be sandwiched between preformed panel circuit...

C439S066000, C361S769000

Reexamination Certificate

active

06994570

ABSTRACT:
An interposer includes an array of buttons on a carrier having a proximity to each other that allows contact between two adjacent buttons to occur when at least one of the two adjacent buttons is axially compressed above a predetermined threshold. The chip package includes a chip having a first surface and a second surface, a printed circuit board having a first surface and a second surface, and an interposer having an array of buttons between the chip and the printed circuit board. The first surfaces are closer to each other than the second surfaces.

REFERENCES:
patent: 6280207 (2001-08-01), Sakata et al.
patent: 6497582 (2002-12-01), Hoffmeyer
patent: 6697261 (2004-02-01), Matsuda
patent: 6730860 (2004-05-01), Searls et al.
patent: 2001/0023782 (2001-09-01), Nakamura
patent: 2004/0177997 (2004-09-01), Hata et al.

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