Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2007-03-06
2007-03-06
Le, Thao X. (Department: 2814)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S129000, C438S284000, C257S343000, C257S390000, C257S401000, C257SE23015
Reexamination Certificate
active
11103772
ABSTRACT:
An LDMOS device includes elementary MOS cells. The gate structure of the elementary cell includes a first conductor material finger. The LDMOS device includes first metal stripes for contacting source regions, second metal stripes for contacting drain regions, and third metal stripes placed on inactive zones for contacting a material finger by forming a contact point. The contact point is formed by a first prolongation of the material finger for connecting with one of the third stripes. The third metal stripe includes at least one fourth metal stripe placed on a separation zone. The material finger has a second prolongation and the fourth metal stripe has a first prolongation to form an additional contact point.
REFERENCES:
patent: 5521409 (1996-05-01), Hshieh et al.
patent: 5583365 (1996-12-01), Villa et al.
patent: 5589405 (1996-12-01), Contiero et al.
patent: 5744843 (1998-04-01), Efland et al.
patent: 5767578 (1998-06-01), Chang et al.
patent: 5852318 (1998-12-01), Chikamatsu et al.
patent: 5898198 (1999-04-01), Herbert et al.
patent: 5973341 (1999-10-01), Letavic et al.
patent: 6020617 (2000-02-01), Jos
patent: 6084277 (2000-07-01), Disney et al.
patent: 6169309 (2001-01-01), Teggatz et al.
patent: 6297533 (2001-10-01), Mkhitarian
patent: 6313512 (2001-11-01), Schmitz et al.
patent: 6555883 (2003-04-01), Disney et al.
patent: 6677210 (2004-01-01), Hebert
patent: 6825536 (2004-11-01), Disney et al.
patent: 6831332 (2004-12-01), D'Anna et al.
patent: 6870222 (2005-03-01), Kim et al.
patent: WO 02/073701 (2002-09-01), None
European Search Report; EP 02 42 5611.
Ponzio Paola
Schillaci Antonino
Hogan & Hartson L.L.P.
Le Thao X.
STMicroelectronics S.r.l.
LandOfFree
High performance, integrated, MOS-type semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High performance, integrated, MOS-type semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High performance, integrated, MOS-type semiconductor device... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3753689