Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-10-30
2007-10-30
Ngo, Chuong D. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
10718303
ABSTRACT:
A floating point unit (FPU) which generates a correction signal and an inverted leading zero signal. Exponent logic, is configured to generate an exponent value, a first incremented exponent value, and a second incremented exponent value. Exponent adjust and rounding logic configured to receive the exponent value, the first incremented exponent value, and the second incremented exponent value. The exponent adjust and rounding logic is further configured to add the inverted leading zero signal to the first incremented exponent value and the second incremented exponent value, thereby producing an exponent output value, a first incremented exponent output value, and a second incremented exponent output value. Either the exponent output value, the first incremented exponent output value, or the second exponent output value are then selected.
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IEEE Computer Society, Standards Committee of the, “IEEE Standard for Binary Floating-Point Arithmetic,” ANSI/IEEE Std 754-1985, Institute of Electrical and Electronics Engineers, Inc., 1985, New York, NY, U.S.A.
Dhong Sang Hoo
Mueller Silvia Melitta
Oh Hwa-Joon
Tran Kevin D.
Carr LLP
Ngo Chuong D.
Rifai D'Ann N.
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