High performance embedded semiconductor memory device with multi

Static information storage and retrieval – Hardware for storage elements

Patent

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Details

365104, 365184, G11C 502

Patent

active

061082295

ABSTRACT:
A dynamic random access memory solves long-existing tight pitch layout problems using a multiple-dimensional bit line structure. Improvement in decoder design further reduces total area of this memory. A novel memory access procedure provides the capability to make internal memory refresh completely invisible to external users. By use of such memory architecture, higher performance DRAM can be realized without degrading memory density. The requirements for system support are also simplified significantly.

REFERENCES:
patent: 4980799 (1990-12-01), Tobita
patent: 5532181 (1996-07-01), Takebuchi et al.
patent: 5912489 (1999-06-01), Chen et al.

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