High performance divider with a sequence of convergence factors

Details High performance divider with a sequence of convergence factors High performance divider with a sequence of convergence factors

1991-02-13

1992-08-18

Mai, Tan V.

Boots, shoes, and leggings

G06F 752

Patent

active

051405458

ABSTRACT:
A system for dividing a digital dividend operand N by a digital divisor operand D to obtain a quotient operand Q with minimal execution time and hardware calculates a value NP.sub.0 P.sub.1 . . . P.sub.m, where the value P.sub.0 P.sub.1 . . . P.sub.m has a magnitude such that NP.sub.0 P.sub.1 . . . P.sub.m converges to Q and DP.sub.0 P.sub.1 converges to 1. The divider employs a one's complementation, multiplication and addition sequence to calculate the value NP.sub.0 P.sub.1 . . . P.sub.m.

REFERENCES:
patent: 4707798 (1987-11-01), Nakano
patent: 4797849 (1989-01-01), Nakano
patent: 4991132 (1991-02-01), Kadota
patent: 5046038 (1991-09-01), Briggs et al.
patent: 5065352 (1991-11-01), Nakano
"Computer Arithmetic", K. Hwang, J. Wiley & Sons, Inc. (1979), Chapter 7, pp. 213-238.
IBM Journal, Jan. 1967, "The IBM System/360 Model 91: Floating-Point Execution Unit", pp. 34-53.

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