High performance CMOS devices comprising gapped dual...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Heterojunction formed between semiconductor materials which...

Reexamination Certificate

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C257S369000, C257S640000, C257SE21267, C257SE21292, C257SE21293, C438S154000, C438S199000

Reexamination Certificate

active

07598540

ABSTRACT:
The present invention relates to complementary metal-oxide-semiconductor (CMOS) devices having gapped dual stressors with dielectric gap fillers. Specifically, each CMOS device of the present invention includes at least one n-channel field effect transistor (n-FET) and at least one p-channel field effect transistor (p-FET). A tensilely stressed dielectric layer overlays the n-FET, and a compressively stressed dielectric layer overlays the p-FET. A gap is located between the tensilely and compressively stressed dielectric layers and is filled with a dielectric filler material. In one specific embodiment of the present invention, both the tensilely and compressively stressed dielectric layers are covered by a layer of the dielectric filler material, which is essentially free of stress. In an alternatively embodiment of the present invention, the dielectric filler material is only present in the gap between the tensilely and compressively stressed dielectric layers.

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Chinese Patent Application Publication No. CN1449585A dated Oct. 15, 2003, English-language abstract only.

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