High performance channel adapter having a pass through function

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Details

39520013, 39520014, 364DIG1, 3642419, G06F 1312

Patent

active

055985807

ABSTRACT:
An adapter for attachment to the bus or video display of a personal computer, workstation or like devices to a high performance parallel interface (HIPPI)channel of a host computer. In a system having at least three devices to be connected to a high performance parallel interface in a "Daisy chain," each of the devices has an adapter capable of both sending and receiving bursts of data with a data click. Each adapter includes an inbound receiver connected to the channel for receiving bursts of data and data clock and a decoder for decoding routing information contained in the bursts of data. A pass through logic circuit is connected to the decoder for interpreting the routing information. A first latch is connected to the inbound receiver for temporarily storing data bursts. A second latch is connected to the first latch for accepting data bursts when the routing information identifies a device to which the adapter is connected. A data selector is connected to the first latch for selecting data from the device or from the first latch. An outbound transmitter is connected to the channel for transmitting bursts of data and a data clock, the outbound transmitter also being connected to the data selector for transmitting data bursts to the next adapter in the Daisy chain from the first latch when the routing information does not identify the device.

REFERENCES:
patent: 4723120 (1988-02-01), Petty, Jr.
patent: 4914625 (1990-04-01), Billian
patent: 5404452 (1995-04-01), Detschel et al.

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