High performance cascadable simplex switch

Multiplex communications – Wide area network – Packet switching

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370 60, 34082502, 34082579, H04Q 100

Patent

active

053094263

ABSTRACT:
A serial simplex switch design is provided which includes I/O ports each of which is configurable specifically for attachment to a data communications subsystem or, alternatively, for cascaded connection to a similarly configured I/O port on another switch. The switch provides a packet routing function including input and output buffers for each of its I/O ports wherein packets of control messages sent by one subsystem are temporarily stored prior to being delivered to the appropriate destination subsystem. When configured to be directly attached to a subsystem, the I/O ports separate control messages from incoming integrated data and control message strings. In a cascade configuration, however, a mechanism is provided wherein data and control messages are separated into two physical paths to eliminate the delays associated with integrated data and control message flow through the cascaded I/O port. Each I/O port is configurable to either of these methods of operation by means of programmable latches associated with the I/O port.

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