High performance carry chain with reduced macrocell logic...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S712000

Reexamination Certificate

active

07003545

ABSTRACT:
A method for computing a sum or difference and a carry-out of numbers in product-term based programmable logic comprising the steps of: (A) generating (i) a portion of the sum or difference and (ii) a lookahead carry output in each of a plurality of logic blocks; (B) communicating the lookahead carry output of each of the logic blocks to a carry input of a next logic block; (C) presenting the lookahead carry output of a last logic block as the carry-out.

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Roger Bettman et al., “Reduced Product Term Carry Chain”, U.S. Appl. No. 09/587,708, filed Jun. 5, 2000.
Chang et al., Carry-select adder using single ripple-carry adder, Oct. 29th, 1998, IEEE, vol. 34, No. 22, pp. 2101-2103.

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