High performance array processor with nonlinear skewing of eleme

Details High performance array processor with nonlinear skewing of eleme High performance array processor with nonlinear skewing of eleme

1991-06-12

1995-02-28

Bowler, Alyssa H.

Boots, shoes, and leggings

364229, 3642295, 3642305, 36423221, 364232, 3642319, 3642402, 36424344, 3642544, 3642565, 364DIG1, 364DIG2, G06F 764, G06F 922, G06F 946, G06F 13378

Patent

active

053945530

ABSTRACT:
An array processor is described with N processing elements, N memory modules, and an interconnection network that allows parallel access and alignment of rows, columns, diagonals, contiguous blocks, and distributed blocks of N.times.N arrays. The memory system of the array processor uses the minimum number of memory modules to achieve conflict-free memory access, and computes N addresses with O(log.sub.2 N) logic gates in O(1) time. Furthermore, the interconnection network is of multistage design with O(Nlog.sub.2 N) logic gates, and is able to align any of these vectors of data for store/fetch as well as for subsequent processing with a single pass through the network.

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