Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2007-09-07
2009-08-04
Ghyka, Alexander G (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S704000, C438S212000, C257SE21632
Reexamination Certificate
active
07569489
ABSTRACT:
The present invention relates to high performance three-dimensional (3D) field effect transistors (FETs). Specifically, a 3D semiconductor structure having a bottom surface oriented along one of a first set of equivalent crystal planes and multiple additional surfaces oriented along a second, different set of equivalent crystal planes can be used to form a high performance 3D FET with carrier channels oriented along the second, different set of equivalent crystal planes. More importantly, such a 3D semiconductor structure can be readily formed over the same substrate with an additional 3D semiconductor structure having a bottom surface and multiple additional surfaces all oriented along the first set of equivalent crystal planes. The additional 3D semiconductor structure can be used to form an additional 3D FET, which is complementary to the above-described 3D FET and has carrier channels oriented along the first set of equivalent crystal planes.
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Yang, et al., “5 nm-Gate Nanowire FinFET”, VLSI Technology, 2004, Digest of Technical Papers, 2004 Symposium on Jun. 15-17, 2004, pp. 196-197.
Dyer Thomas W.
Yang Haining S.
Abate Esq. Joseph P.
Ghyka Alexander G
International Business Machines - Corporation
Patel Reema
Scully , Scott, Murphy & Presser, P.C.
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