High mobility heterojunction complementary field effect...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S628000

Reexamination Certificate

active

07057216

ABSTRACT:
In all representative embodiments presented, the Ge concentration in the source and drain10and the SiGe epitaxial channel layer20is in the 15% to 50% range, preferably between about 20% to 40%. The SiGe thicknesses in the source/drain10are staying below the critical thickness for the given Ge concentration. The critical thickness is defined such that above it the SiGe will relax and defects and dislocations will form. The thickness of the SiGe epitaxial layer20typically is between about 5nm and 15nm. The thickness of the epitaxial Si layer30is typically between about 5nm and 15nm. FIG.1A shows an embodiment where the body is bulk Si. These type of devices are the most common devices in present day microelectronics. FIGS.1B and1C show representative embodiment of the heterojunction source/drain FET device when the Si body40is disposed on top of an insulating material55. This type of technology is commonly referred to as silicon on insulator (SOI) technology. The insulator material55usually, and preferably, is SiO2. FIG.1B shows an SOI embodiment where the body40has enough volume to contain mobile charges. Such SOI devices are called partially depleted devices. FIG.1C shows an SOI embodiment where the volume of the body40is insufficient to contain mobile charges. Such SOI devices are called fully depleted devices. For devices shown in FIG.1B and1C there is, at least a thin, layer of body underneath the source and drain10. This body material serves as the seed material onto which the epitaxial SiGe source and drain10are grown. In an alternate embodiment, shown in FIG.1D. for extremely thin fully depleted SOI devices, one could grow the source and drain10laterally, from a lateral seeding, in which case the source and drain10would penetrate all the way down to the insulating layer55.

REFERENCES:
patent: 3599010 (1971-08-01), Crawford
patent: 5818076 (1998-10-01), Zhang et al.
patent: 6274894 (2001-08-01), Wieczorek et al.
patent: 6319799 (2001-11-01), Ouyang et al.
patent: 6406951 (2002-06-01), Yu
patent: 6724019 (2004-04-01), Oda et al.
Ouyang et al, “A Novel Si/SiGe . . . Current” IEEE Transactions On Electron Devices vol. 47 No. 10 Oct. 2000. pp. 1943-1949.

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