High/low doping profile for twin well process

Details High/low doping profile for twin well process High/low doping profile for twin well process

1988-01-25

1989-12-26

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 437 57, 437 28, 437 27, 357 42, 357 91, 357 2311, H01L 21265, H01L 2700

Patent

active

048898252

ABSTRACT:
A process for forming n- and p-wells in a semiconductor substrate wherein each well has a shallow, highly-doped surface layer whose depth may be independently controlled. This high/low doping profile for a twin well CMOS process may be produced using only one mask level. The method provides high/low impurity profiles in each well to optimize the NMOS and PMOS active transistors; provides close NMOS to PMOS transistor spacing; avoids a channel-stop mask level and avoids a threshold adjustment/punchthrough mask level.

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