High linearity passive mixer and method thereof

Telecommunications – Receiver or analog modulated signal frequency converter – With wave collector

Reexamination Certificate

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C455S295000, C455S310000

Reexamination Certificate

active

08055233

ABSTRACT:
A high linearity mixer circuit includes a commutation network comprising four switches to provide an electrical coupling between a first pair of circuit nodes and a second pair of circuit nodes, whereas the coupling has two states and is controlled by a pair of complementary logical signals. The mixer circuit further comprises a first pair of current-sourcing devices coupled to the first pair of circuit nodes and a second pair of current-sourcing devices coupled to the second pair of circuit nodes. The mixer circuit further includes a pair of capacitors to provide AC coupling, either between the first pair of circuit nodes and a first external circuit, or between the second pair of circuit nodes and a second external circuit.

REFERENCES:
patent: 4113996 (1978-09-01), Sanderson
patent: 6889037 (2005-05-01), Darabl
patent: 7107025 (2006-09-01), Khorram
patent: 7254380 (2007-08-01), Kuei-Ann et al.
patent: 2008/0268805 (2008-10-01), Hsieh et al.
patent: I241077 (2005-10-01), None
H. Ramiah and T. Z. A. Zulklifli, “High Linearity 0.18μm CMOS Mixer with Current Draining Technique,” IEEE TENCON, pp. 1-5, Nov. 2005.
K. Dufrene adn R. Weigel, “IP2 and DC Offset Turning in Current Mode Output Down Conversion Mixers,” IEEE Symp. RFIC, Jun. 2006.

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