Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals
Reexamination Certificate
2002-07-12
2003-10-28
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific input to output function
Combining of plural signals
C327S356000, C455S333000
Reexamination Certificate
active
06639446
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a mixer circuit with high linearity and high gain.
2. Description of Related Art
FIG. 9
is a circuit diagram showing a configuration of a conventional cascode mixer circuit with a source connected to a negative feedback impedance element. In
FIG. 9
, the reference symbol V
DD
designates a power supply terminal; Z
11
designates an impedance element that has a DC path and is connected to the power supply terminal V
DD
; Z
12
designates an impedance element that has a DC path and is connected to the impedance element Z
11
.
The reference symbol M
1
designates a MOSFET having its drain connected to the impedance element Z
12
; M
2
designates a MOSFET having its drain connected to the source of the MOSFET M
1
; and Zs designates an impedance element that has a DC path and is connected across the source of the MOSFET M
2
and a ground terminal. The back gates of the MOSFETs M
1
and M
2
are connected to the ground terminal.
The impedance elements Z
11
, Z
12
and Zs are each composed of a passive element such as a resistor, capacitor and inductance.
The reference symbol LOin designates an LO (local) signal input terminal connected to the gate of the MOSFET M
1
; RFin designates an RF (radio frequency) signal input terminal connected to the gate of the MOSFET M
2
; and IFout designate an output terminal connected between the impedance elements Z
11
and Z
12
.
Next, the operation of the conventional cascode mixer circuit will be described.
The RF input signal fed through the RF signal input terminal RFin is a small signal expressed by A
RFIN
sin (&ohgr;
RF
t). On the other hand, the LO input signal fed through the LO signal input terminal LOin is a large signal expressed by sq(&ohgr;
LO
t) which switches the MOSFET M
1
.
The output signal IF
OUT
produced from the output terminal IFout is expressed as follows.
IF
OUT
=
Z11
×
β
A
RFIN
sin
(
ω
RF
t
)
×
sq
(
ω
LO
t
)
=
β
Z11A
RFIN
sin
(
ω
RF
t
)
×
(
2
/
π
)
[
(
π
/
4
)
+
sin
(
ω
LO
t
)
+
…
]
(
1
)
where &bgr; is a transconductance of the MOSFET M
2
determined by its process and device structure.
The major output signal component S
M
without the DC component is expressed by the following expression (2).
S
M
≈
(
2
/
π
)
β
Z11A
RFIN
sin
(
ω
RF
t
)
×
sin
(
ω
LO
t
)
=
(
1
/
π
)
β
Z11A
RFIN
×
[
cos
(
&LeftBracketingBar;
ω
RF
-
ω
LO
&RightBracketingBar;
t
)
-
cos
(
(
ω
RF
+
ω
LO
)
t
)
]
(
2
)
Thus, two frequency components, the sum and difference components of the RF input signal and LO input signal, are obtained, making it possible to obtain one of them by filtering the output signal IF
OUT
in an actual application.
One of the causes of the distortion of the mixer circuit as shown in
FIG. 9
is the nonlinearity of the drain source transconductance g
ds
of the MOSFET M
2
, which is given by the following expression (3).
g
ds
=
k
ds
2
L
V
DS
-
(
V
GS
-
V
T
)
+
φ
0
I
Dsat
I
Dsat
=
β
2
(
V
GS
-
V
T
)
2
(
3
)
where L is the length of the gate of the MOSFET M
2
, V
GS
is the gate-source voltage, V
DS
is the drain-source voltage, V
T
is the threshold voltage, &PHgr;
o
is the built-in voltage, and k
ds
is a constant determined by the process.
Thus, the changes in the drain-source transconductance g
ds
against the drain-source voltage V
DS
is expressed by the following expression (4), and the distortion becomes large when the drain-source voltage V
DS
is small.
∂
g
ds
∂
V
DS
=
-
k
ds
4
L
(
V
DS
-
(
V
GS
-
V
T
)
+
Φ
0
)
3
2
I
Dsat
(
4
)
With the foregoing configuration, the conventional mixer circuit has the following problems. First, although the MOSFET M
1
determines the drain-source voltage V
DS
of the MOSFET M
2
to which the RF input signal is applied, it is difficult to apply a large bias to the MOSFET M
1
, particularly when the power supply voltage is small. Thus, it has a problem of increasing the distortion.
In addition, to achieve the high gain, the impedance element Z
11
or the gate-source voltage V
GS
of the MOSFET M
2
must be increased. However, operation at the low power supply voltage in these cases will present the following problems. First, increasing the impedance element Z
11
will drop the drain potential, which can disable the operation of the MOSFET M
2
. Second, as for the gate-source voltage V
GS
, since the bias voltage beyond the power supply voltage is impossible, such a condition as the power supply voltage of 1.0 V and the threshold voltage V
T
of 0.35 V cannot achieve a large gain.
SUMMARY OF THE INVENTION
The present invention is implemented to solve the foregoing problems. It is therefore an object of the present invention to provide a mixer circuit capable of achieving high linearity and high gain even at a low power supply voltage.
According to a first aspect of the present invention, there is provided a mixer circuit including a first mixer circuit comprising a first and second MOS transistors connected in cascode; a first impedance element connected to the drain of the first MOS transistor; a first signal input terminal connected to the gate of the first MOS transistor to be supplied with an RF signal; and a second signal input terminal connected to the gate of the second MOS transistor to be supplied with a local signal, wherein a relationship (V
G1
−V
GS2
)<(V
GS2
−V
T1
) is established, where V
G1
is a bias voltage applied to the gate of the first MOS transistor, V
GS2
is a bias voltage applied to the gate of the second MOS transistor, and V
T1
is a threshold voltage of the first MOS transistor, the bias voltages V
G1
and V
GS2
being each defined with respect to the source bias voltage of the second MOS transistor. Here, the first mixer circuit may further comprises a second impedance element connected between the first impedance element and the first MOS transistor; and a third impedance element connected between the second MOS transistor and the ground. Thus, it can increase the drain-source voltage of the first MOS transistor to which the RF signal is supplied, offering an advantage of being able to implement a high linearity and low distortion mixer circuit even under the condition of a low power supply voltage.
According to a second aspect of the present invention, there is provided a mixer circuit including a first mixer circuit having one of the first signal input terminal and the second signal input terminal connected to a back gate of at least one of the first MOS transistor and the second MOS transistor. The first mixer circuit may comprise the above-mentioned second impedance element and third impedance element. It may further comprise a fourth impedance element connected across one of the first signal input terminal and the second signal input terminal and a back gate of at least one of the first MOS transistor and the second MOS transistor. Besides, the first signal input terminal may be supplied with an RF signal, and the second signal input terminal may be supplied with a local signal. Thus, the mixer circuit can reduce the threshold voltage of the MOS transistor, and hence increase the current flowing through the MOS transistors even under the condition of the low power supply voltage, thereby offering an advantage of being able to increase the gain.
Here, the relationship (V
G1
−V
GS2
)<(V
GS2
−V
T1
) may be established. Thus, it can increase the drain-source voltage of the first MOS transistor to which the RF signal is supplied, offering an advantage of being able to implement a high linearity and low distortion mixer circuit even under the condition of a low power supply voltage.
The first signal input terminal m
Komurasaki Hiroshi
Sato Hisayasu
Ueda Kimio
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