High linearity capacitor using a damascene tungsten stud as the

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257532, H01L 2943

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active

059694068

ABSTRACT:
The present invention sets forth a process of making, and a device comprising, a capacitor with a damascene tungsten lower electrode. The capacitor is manufactured by first depositing an insulating nitride layer on a field oxide layer, followed by deposition of a layer of oxide on the nitride layer. A gap is etched into both the nitride and oxide layers, wherein a lower electrode comprising a damascene tungsten stud is deposited following deposition of a Ti/TiN liner for the stud. An oxide layer is next formed over the stud having a conducting tungsten channel with another Ti/TiN liner disposed therethrough and connecting with the stud. Then, a metal layer is deposited and etched to form both a contact for the stud via connection to the channel, and an upper electrode insulated from the contact. The resulting capacitor is one having a damascene tungsten lower electrode exhibiting high linearity and sound matching characteristics, and is versatile for use with analog circuits and manufacturable at a thickness of significantly less than one micron.

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S. Subbanna et al., "A High-Density 6.9 sq. .mu.m Embedded SRAM Cell in a High-Performance 0.25 .mu.m-Generation CMOS Logic Technology", International Electron Devices Meeting, 275-278 (1996).
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F. White et al., "Damascene Stud Local Interconnect in CMOS Technology", International Electron Devices Meeting, 301-304 (1992).

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