Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-05-31
2011-05-31
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S106000, C716S109000, C716S111000, C716S120000, C716S133000
Reexamination Certificate
active
07954078
ABSTRACT:
A method to produce an information structure in computer readable memory that specifies power source hierarchy information for an RTL circuit design that includes multiple function instances encoded in computer readable memory, comprising: providing associations within the memory between respective function instances of the RTL design and respective power domains so as to define respective primary power domains relative to the RTL design; specifying in the memory respective secondary power domains; and providing associations within the memory that are indicative of respective power source relationships between respective primary power domains and corresponding respective secondary power domains.
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“Unified Power Format (UPF) Standard—Version 1.0”, by Accellera, Version 1.0, Feb. 22, 2007 , http://www.unifiedpowerformat.com/images/UPF.v1.0—Standard.pdf.
Chen Pinhong
Hines Mitchell W.
Wang Qi
Cadence Design Systems Inc.
Dinh Paul
Nguyen Nha T
Schwegman Lundberg & Woessner, P.A.
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