High latency timing circuit

Details High latency timing circuit High latency timing circuit

2006-05-23

2006-05-23

Kinkead, Arnold (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

C375S376000, C713S400000, C360S051000

Reexamination Certificate

active

07049896

ABSTRACT:
A phase locked loop circuit includes a frequency integrator responsive to a received signal. A phase integrator is responsive to the frequency integrator and a phase shift measurement circuit is responsive to the phase integrator and in communication with the frequency integrator. The phase shift measurement circuit is configured to supply a frequency offset to an input of the frequency integrator. When the input to the frequency integrator selectively receives a predetermined value, the phase integrator is configured to synchronize phase and to output a phase signal, and the phase shift measurement circuit is configured to determine the frequency offset using the phase signal. When the input to the frequency integrator circuit selectively receives the determined frequency offset, the frequency integrator circuit and the phase integrator are configured to track deviations of frequency and phase in the received signal and to adjust frequency and phase of the received signal.

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