High-k dual dielectric stack

Details High-k dual dielectric stack High-k dual dielectric stack

2007-06-29

2010-11-16

Vu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

Reexamination Certificate

active

07834426

ABSTRACT:
The present invention discloses a method including: providing a Group III-V component semiconductor material; forming a first layer over a surface of the Group III-V component semiconductor material, the first layer to unpin a Fermi level at the surface; forming a second layer over the first layer, the second layer for scaling an equivalent oxide thickness (EOT); and annealing the first layer before or after forming the second layer to remove bulk trap defects in the first layer.

REFERENCES:
patent: 4811077 (1989-03-01), Fowler et al.
patent: 7163860 (2007-01-01), Kamal et al.
patent: 2003/0137018 (2003-07-01), Passlack et al.
patent: 2003/0219994 (2003-11-01), Goodhue
patent: 2006/0131652 (2006-06-01), Li
patent: 2007/0069240 (2007-03-01), Passlack
patent: 2007/0082505 (2007-04-01), Abrokwah et al.
patent: 2008/0003752 (2008-01-01), Metz et al.

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