High input impedance, high gain CMOS strobed comparator

Details High input impedance, high gain CMOS strobed comparator High input impedance, high gain CMOS strobed comparator

1986-11-14

1988-01-05

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307362, 307279, 307530, H03K 524, H03K 3356

Patent

active

047178388

ABSTRACT:
A CMOS high gain strobed comparator comprising a cascoded input differential stage with current mirror loads. The DC biasing for the input stage cascode devices is set by a replica biasing technique. The loads to the input differential stage are simple current mirrors which drive a set of cross-coupled devices that form a latch. The high gain of the comparator is realized in the second stage. The differential output of the comparator drives a second latch. This second cross-coupled latch stores and maintains the comparator data even after the strobe signal destroys the data of the differential output.

REFERENCES:
patent: 4150311 (1979-04-01), Matsuda et al.
patent: 4511810 (1985-04-01), Yukawa
patent: 4561702 (1985-12-01), McAdams
patent: 4572974 (1986-02-01), Frieling et al.
patent: 4602167 (1986-07-01), Yukawa
H. L. Fiedler and B. Hoefflinger, "A CMOS Pulse Density Modulator for High-Resolution A/D Converters", IEEE Journal , vol. 19, No. 6, Dec., 1984.

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