High impedance digital full line video clamp

Details High impedance digital full line video clamp High impedance digital full line video clamp

2005-10-18

2005-10-18

Natnael, Paulos M. (Department: 2614)

Television

Image signal processing circuitry specific to television

Dc insertion

Reexamination Certificate

active

06956621

ABSTRACT:
A circuit for clamping a TV signal includes an input capacitor coupled to the TV signal, an analog-to-digital converter that outputs a digital signal corresponding to TV signal, a comparator that compares the digital signal to a black level signal, and a high impedance driver that charges the input capacitor in response to an output of the comparator.

REFERENCES:
patent: 4228463 (1980-10-01), Steckler et al.
patent: 4386370 (1983-05-01), Harwood et al.
patent: 4564863 (1986-01-01), Chameroy et al.
patent: 5084700 (1992-01-01), Christopher
patent: 5371552 (1994-12-01), Brummette et al.
patent: 5410363 (1995-04-01), Capen et al.
patent: 5841488 (1998-11-01), Rumreich
patent: 5986719 (1999-11-01), Nakamura
patent: 6492921 (2002-12-01), Kunitani et al.
patent: 0 280 123 (1988-02-01), None
patent: 0 609 759 (1994-01-01), None
patent: 0 926 887 (1998-12-01), None
patent: WO 00/57556 (2000-09-01), None
patent: WO 02/43375 (2001-11-01), None
European Search Report for Appln. No. EP 03012795.5-1241, issued Sep. 22, 2003, 3 pages.

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