Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-07-08
2004-06-22
Kang, Donghee (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S050000, C257S173000, C257S387000, C257S530000, C257S665000, C438S131000, C438S467000, C438S600000, C438S957000, C365S096000, C365S225700
Reexamination Certificate
active
06753590
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The invention relates generally to semiconductor integrated circuits, and more particularly to antifuse elements.
2. Background Art
In the field of semiconductor integrated circuits, it is generally known to construct fuse elements that can be programmed (either optically or electrically) to provide an electrical open circuit in a link that normally provides a conductive path when activated. Such elements are used for example to set a sequence of address bits for a redundant line of memory cells, or to set product information that is subsequently read when a system is first powered up.
It is also known to provide an “antifuse,” which is a programmable element that provides a selective short circuit. This is typically done by providing a stimulus that decreases the resistance of a programmed element. See for example U.S. Pat. No. 5,242,851, “Programmable Interconnect Device and Method of Manufacturing Same,” which teaches the use of a line of intrinsic polysilicon that decreases in resistance from 10 G ohms to 500 to 100 ohms when programmed. In U.S. Pat. No. 5,557,136, “Programmable Interconnect Structures and Programmable Integrated Circuits,” two titanium-tungsten layers are separated by amorphous silicon, which breaks down during programming to form a conductive filament where it is thinned. Selective silicide formation as an antifuse is taught in U.S. Pat. No. 6,051,851, “Semiconductor Devices utilizing Silicide Reaction.” Conductor-filled vias as a programming element are taught in Re. No. 36,893, “Anti-Fuse Structure For Reducing Contamination of the Anti-Fuse Material.”
A particular type of antifuse that has been used more recently is the “insulator antifuse,” in which reliance is placed on dielectric breakdown of an insulator between conductors to provide the decreased resistance. U.S. Pat. No. 5,909,049, “Antifuse Programmed PROM Cell,” discloses a composite insulator of oxide, oxide-nitride, oxide (or O—N—O) that breaks down at an applied voltage of 10-18 volts to program the cell by melting the silicon below the insulator. U.S. Pat. No. 6,020,777, “Electrically Programmable Antifuse Circuit,” teaches a MOS capacitor that is programmed by Fowler-Nordheim tunneling current when the applied voltage is 2× Vdd.
All of the above teachings rely on high programming voltages or currents to substantially alter the physical or electrical properties of the programmed element. With increasing device integration, applying these high stresses to elements to be programmed increases the possibilities of damaging non-programmed circuit elements. For example, a programming voltage of 18 volts will impart electrical fields that will damage other integrated circuit elements in adjacent circuits. At the same time, it is important for the antifuse to undergo a large resistance change so that it can be reliably sensed.
Accordingly, a need has developed in the art for antifuses that can be programmed at lower applied programming energies, while still creating an indication of its programmed state.
BRIEF SUMMARY OF THE INVENTION
It is thus an object of the present invention to provide antifuses that can be programmed at voltages and currents that reduce the possibility of damaging non-programmed circuit elements.
It is another aspect of the invention to provide antifuses that can be programmed at such lower applied energies while still being reliably sensed.
In a first aspect, the invention is a programmable element that has a first device having a first electrode and a first insulator disposed between the substrate and said electrode, said first insulator having a first value of a given parameter, and a second device having a second electrode and a second insulator disposed between the substrate and said second electrode, said second insulator having a second value of said given parameter that is different from said first value. The first and second electrodes are coupled to one another, and a source of programming energy is coupled to the first device to cause it to permanently decrease in resistivity when programmed. The programmed state of the first device is indicated by a conductive state of the second device.
In a third aspect, the invention is a method of forming an integrated circuit including a programmable element, comprising the steps of forming a first device on a substrate having a first electrode and a first insulator disposed between the substrate and said first electrode, the first insulator having a first value of a given parameter; forming a second device on a substrate having a second electrode and a second insulator disposed between the substrate and the second electrode, the second insulator having a second value of the given parameter that is different from the first value; coupling the first and second electrodes to one another; and coupling a source of programming energy to the first device.
REFERENCES:
patent: 5242851 (1993-09-01), Choi
patent: 5557136 (1996-09-01), Gordon et al.
patent: 5656534 (1997-08-01), Chen et al.
patent: 5909049 (1999-06-01), McCollum
patent: 6020777 (2000-02-01), Bracchitta et al.
patent: 6051851 (2000-04-01), Ohmi et al.
patent: RE36893 (2000-10-01), Pramanik et al.
patent: 6130469 (2000-10-01), Bracchitta et al.
patent: 6140692 (2000-10-01), Sher et al.
patent: 6240033 (2001-05-01), Yang et al.
Fifield John A.
Houghton Russell J.
Tonti William R.
Kang Donghee
Walsh Robert A.
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