High holding voltage ESD protection structure and method

Details High holding voltage ESD protection structure and method High holding voltage ESD protection structure and method

2005-09-20

2005-09-20

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Combined with field effect transistor

C257S360000

Reexamination Certificate

active

06946690

ABSTRACT:
The holding voltage (the minimum voltage required for operation) of a LVTSCR-like device is increased to a value that is greater than a dc bias on a to-be-protected node. The holding voltage is increased by reducing the size of the p+ emitter defined by the LVTSCR-like device. As a result, the LVTSCR can be utilized to provide ESD protection to power supply pins, having better current capabilities than a GGNMOS and better holding voltage characteristics than a LVTSCR.

REFERENCES:
patent: 6433368 (2002-08-01), Vashchenko et al.
patent: 6509585 (2003-01-01), Huang

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