Amplifiers – With semiconductor amplifying device – Including current mirror amplifier
Reexamination Certificate
2000-09-19
2001-10-09
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including current mirror amplifier
C330S257000
Reexamination Certificate
active
06300836
ABSTRACT:
FIELD OF INVENTION
The present invention relates to amplifiers and more particularly to a high gain, wide band and linear amplifier suitable for bipolar transistors.
BACKGROUND OF INVENTION
For a wide band amplifier it is necessary to maximize the gain-bandwidth product. It is possible to obtain the desired gain by using several amplification stages. However, the linearity and the stability of the amplification factor will be low in this case. Both parameters may be improved by employing negative feedback. However, negative feedback in multistage amplifiers has an inherent high frequency stability problem. Moreover, the time delay of multistage amplifiers is equal to the sum of the time delays for each stage.
The present invention aims to provide an amplifier with high gain and low bandwith degradation.
A prior art basic amplifier circuit design is shown in FIG.
1
. The basic amplifier circuit shown is formed by a PNP input transistor Q
1
, connected in an emitter follower configuration and coupled to the base of an NPN transistor Q
2
, connected in a common emitter configuration. A current mirror circuit takes a collector current of the transistor Q
2
and passes equal currents to the emitter circuit of Q
1
and to an output load resistance R
4
. A diode connected transistor Q
4
provides for the receiving of the input current and transistors Q
3
and Q
6
provide the output currents. The resistances R
2
, R
3
and R
5
are current equalizing elements and are selected to be equal to one another. An emitter resistor R
1
is connected in the emitter circuit of the transistor Q
2
.
The output, V
out
, of this circuit has generally been described in the prior art by the equation:
V
out
=(R
4
/R
5
) (R
2
/R
1
) V
in
.
To increase the amplification of the circuit, the resistance R
1
must be decreased toward zero. In practice, however, when this is done the amplification factor proves to be relatively low and non-linear distortion is not avoided. Moreover, the direct current bias point of the circuit will be indeterminate.
This is for two reasons. Firstly, the current mirror circuit has relatively low accuracy so that the collector currents of transistors Q
1
and Q
2
are not equal, and secondly because even where such collector currents are equalized, there is an inequality in the base-emitter voltages of the two transistors Q
1
and Q
2
, being of different types, PNP and NPN. Moreover, these voltages have opposite dependence during variations caused by the amplified signal.
SUMMARY OF INVENTION
The present invention aims to provide better performance by providing a direct current bias point control circuit and a stabilizing circuit to work in conjunction with the basic amplifier. The invention also aims to provide a differential amplifier configuration including a differential pair balancing circuit.
According to one aspect, the present invention provides an amplifier circuit comprising:
a basic amplifier including
a first and a second transistor of opposite type in which the emitter terminal of the first transistor is connected to the input of the second transistor, and in which the collector terminal of the first transistor is connected to the emitter terminal of the second transistor to form a first current summing point, and
a current mirror circuit connected to the first and second transistors to provide substantially equal collector currents in each of the first and second transistors; and
said amplifier circuit further including
a current source connected to said first current summing point to control the DC bias point of the first and second transistors.
REFERENCES:
patent: 4420725 (1983-12-01), Sueyoshi et al.
patent: 4730124 (1988-03-01), Metz
patent: 5142242 (1992-08-01), Schaffer
patent: 5359295 (1994-10-01), Nishimura
patent: 5574403 (1996-11-01), Kolluri
Kilpatrick & Stockton LLP
Nguyen Khanh Van
Pascal Robert
Wolf Technologies Limited
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