High gain differential amplifier capable of reducing offset volt

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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Details

330257, 330261, H03F 345

Patent

active

053961919

ABSTRACT:
A high gain differential amplifier including a current mirror circuit, a differential transistor pair having first and second transistors whose gates are connected to first and second input terminals, a first constant-current source connected to common sources of the first and second transistors, and a pair of third and fourth transistors whose gates are coupled, in which the fourth transistor is connected to the first transistor and an output terminal is coupled with a drain of the second transistor. The differential amplifier further includes a fifth transistor whose gate and drain are connected to the drains of the first and fourth transistors and to the output terminal and the drain of the second transistor, respectively, a sixth transistor whose drain and gate are connected to the drain and gate of the third transistor and to a bias power supply terminal, and a second constant-current source connected to the source of the sixth transistor. The addition of the sixth transistor permits a voltage between the drain and source of the third and fourth transistors to be nearly equal. As a result, a drain current ratio between the third and fourth transistors can be precisely determined and thus an input offset voltage can be reduced to nearly zero.

REFERENCES:
patent: 4661779 (1987-04-01), Okamoto

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