High gain CMOS amplifier

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S072000, C327S560000, C327S563000

Reexamination Certificate

active

06304109

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of amplifiers, and particularly to CMOS amplifiers having high gain.
2. Description of the Related Art
A wide variety of circuit designs have been used to realize integrated circuit (IC) amplifiers. Operational amplifiers are employed extensively, and usually comprise a differential input stage and a single-ended output stage.
Although such amplifiers have served many practical purposes, their performance is not fully satisfactory in certain respects. For example, the gain of many prior amplifiers tends to be low, or to vary to an undesired degree with changes in load, due to variations in ambient temperature, for example. When used in an application such as a high precision voltage reference, such variation can adversely affect circuit performance to an unacceptable degree.
One high gain IC amplifier is described in U.S. Pat. No. 4,857,862 to Brokaw. The operating point of this amplifier is automatically adjusted to keep the amplifier balanced over changes in load. However, this amplifier is designed to operate only with bipolar transistors; for example, it is arranged so that the effects of several base currents compensate one other, thereby improving performance. As a result, this bipolar amplifier is ill-suited for use in a CMOS circuit.
SUMMARY OF THE INVENTION
A CMOS amplifier is presented which provides high gain from a simple circuit. The amplifier is suitably combined with a bandgap cell to provide a high precision voltage reference circuit.
The amplifier includes a differential input stage made from a pair of field-effect transistors (FETs) having their sources connected to a common tail current. A first current mirror reflects the drain current from one of the pair transistors to the other at a first node. A pair of FETs are connected to conduct an output current and an adjustment current in response to the voltage at the first node. The output current drives a load at a second node, which is connected to one of the input stage gates via a feedback path such that the output voltage tracks an input voltage applied to the other input stage gate. The adjustment current is reflected via a second current mirror to provide the common tail current. The amplifier is arranged to vary the tail current with the output current such that the operating point of the differential input stage is automatically adjusted to keep the drain voltages of the first and second FETs equal when the amplifier is in equilibrium. By reducing the differential voltage between the drain voltages over a wide output current range, gain error is reduced and gain increased. The tail current is made to adjust as described by arranging the adjustment current transistor and the transistors of the first current mirror to have equal current densities when the amplifier is in an equilibrium state.
The amplifier is suitably combined with a bandgap cell to produce a voltage reference circuit. Additional FETs, all in controlled ratio to one another, are connected to conduct respective currents in response to the voltage at the first node; these currents and the current at the second node drive an array of bipolar transistors and resistors arranged in a bandgap cell configuration, with the outputs of one of the additional FETs connected to the open input stage gate. The amplifier detects when the two input lines differ in voltage, and automatically adjusts the magnitude of the fixed ratio output currents to bring the voltages to balance. The amplifier keeps the input nodes balanced over variations in temperature, supply voltage, etc., thereby enabling a bandgap reference voltage to be generated.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.


REFERENCES:
patent: 4857862 (1989-08-01), Brokaw
patent: 4893092 (1990-01-01), Okamoto
patent: 5463339 (1995-10-01), Riggio, Jr.
patent: 6166587 (2000-12-01), Burzio et al.

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