Amplifiers – With periodic switching input-output
Reexamination Certificate
2002-10-31
2004-08-17
Choe, Henry (Department: 2817)
Amplifiers
With periodic switching input-output
C330S069000, C327S124000
Reexamination Certificate
active
06778009
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to electronic amplifiers, and more particularly to switched capacitor circuit amplifiers.
BACKGROUND OF THE INVENTION
Advances in analog signal processing require high voltage gain amplifiers that are capable of amplifying a small input signal with a high voltage gain to increase the dynamic range of analog signal processing blocks. The high voltage gain amplifiers should also minimize the quantization noise level of any analog-to-digital converter in an analog signal processing block. The high voltage gain amplifier requires a large amount of bias current, which increases power dissipation and the power noise level that is required for achieving a high voltage gain.
SUMMARY OF THE INVENTION
The present invention is directed towards a switched capacitor high voltage gain amplifier circuit. According to one aspect of the invention, the switched capacitor high voltage gain amplifier circuit comprises a first, second, and third capacitor and an amplifier. The first capacitor is configured to store a sampled charge that is associated with an input signal during a sampling phase and transfer the sampled charge during a holding phase. The second capacitor is configured to discharge during the sampling phase and provide a first capacitive feedback path such that a first amplified charge is stored on the second capacitor during the holding phase. The third capacitor is configured to provide a second capacitive feedback path during the sampling phase and discharge during the holding phase. The amplifier is configured to amplify the transferred sampled charge during the holding phase, wherein the amplifier has a first frequency response during the holding phase. The amplifier is configured to buffer the amplified charge during the sampling phase, wherein the amplifier has a second frequency response during the sampling phase. The second frequency response has a bandwidth that is wider than a bandwidth of the first frequency response. The bandwidth of the first and second frequency responses is adjusted in response to a bias current of the amplifier.
According to another aspect of the invention, a method for amplifying a signal comprises storing a sampled charge that is associated with an input signal during a sampling phase on a first capacitor. The sampled charge is transferred from the first capacitor during the holding phase. A first capacitive feedback path is provided through which a first amplified charge is stored on a second capacitor during the holding phase. A second capacitive feedback path is provided during the sampling phase. The transferred sampled charge is amplified using the first capacitive feedback path during the holding phase, wherein the amplifying is associated with a first frequency response. The stored first amplified charge is buffered using the second capacitive feedback path during the sampling phase, wherein the buffering is associated with a second frequency response that has a bandwidth that is wider than a bandwidth of the first frequency response.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrated embodiments of the invention, and to the appended claims.
REFERENCES:
patent: 5410270 (1995-04-01), Rybicki et al.
patent: 5805019 (1998-09-01), Shin
patent: 6169427 (2001-01-01), Brandt
patent: 6400220 (2002-06-01), Wang et al.
Choe Henry
Hennings Mark R.
Merchant & Gould
National Semiconductor Corporation
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