High gain amplifying stage by output conductance cancellation

Amplifiers – With semiconductor amplifying device – Including field effect transistor

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Details

330284, 330112, H03F 316, H03F 138, H03G 318

Patent

active

045256799

ABSTRACT:
A Metal-Oxide Semiconductor (MOS) high gain amplifying stage which overcomes the inherently low transconductance, gm, of MOS transistors is described. This is achieved by using a specially configured load transistor in combination with a driver transistor. The load transistor is provided, by means of positive feedback, with a current generator which is dependent on the output voltage of the stage and has an effective negative output conductance. The positive feedback is achieved by connecting an appropriate attenuation stage between the output and the input of the load transistor. By the cancellation of output conductances between the driver and load transistors, a near infinite voltage gain can be achieved despite resistive loading at the output of the amplifier. The MOS amplifying stage has application in amplifiers, comparators and oscillators. A complementary metal-oxide-semiconductor (CMOS) implementation has been realized but the principle is equally applicable to single channel (NMOS or PMOS) MOS technology.

REFERENCES:
patent: 3286189 (1966-11-01), Mitchell et al.

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