High frequency tunable filter

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S552000

Reexamination Certificate

active

06646498

ABSTRACT:

CROSS-REFERENCES TO RELATED APPLICATIONS
Not Applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
BACKGROUND OF THE INVENTION
The present embodiments relate to electronic circuits and are particularly directed to a tunable high frequency filter used in such circuits.
Filters are commonly used in numerous types of electronic circuits to separate extraneous and undesirable components from a signal. One issue in implementing bandpass filters relates to the precision of the location of the filter's center frequency, and another issue for bandpass as well as low and high pass filters relates to the precision of the location of the filter's cutoff frequency. Cutoff frequency is typically defined in the art as the frequency location where the gain of the filter is 3 dB less than the gain at the filter's center frequency and, therefore, is also is sometimes referred to as a filter's 3 dB point. Due to fabrication process variations, the device characteristics of the components which form the filter may vary. As a result, these variations cause the filter center frequency and cutoff frequency also to vary. Naturally, such variations are undesirable because they cause the filter to operate differently than it would at its intended center frequency and cutoff frequency.
In order to compensate for the variations in filter center frequency and cutoff frequency, it is known in the art to provide mechanisms to tune filters, sometimes referred to as the construction of a tunable filter. A tunable filter includes some sort of scheme for adjusting the filter center frequency and cutoff frequency after the filter is constructed. Typically the manufacturer of the filter uses the tuning scheme to adjust the filter toward its intended characteristics so as to overcome the process variations. While the tuning circuit therefore allows some adjustment to the filter, it also adds parasitic attributes to the filter. The parasitics may undesirably affect the pole and zero locations for the filter as well as the response shape (i.e., including the Q of the filter). More particularly, in a filter used for a relatively low frequency application on the order of a few megahertz, the RC values of the filter circuit are relatively large as compared to the parasitic values added to the filter due to the tuning circuit. As a result, the effects of the tuning circuit on the filter are typically acceptable for numerous applications. However, in a filter used for a relatively high frequency application on the order of several hundred megahertz or greater, the RC values of the filter circuit are smaller than those in the low frequency filter and, as a result, these RC values are much more influenced by the parasitic values added to the filter due to the tuning circuit. Thus, the high frequency filter is more difficult to design in view of process variations and corrective tuning circuits. In addition, for many filters a tuning circuit may consume too much power or active area relative to the filtering circuit.
In view of the above, it is recognized that various difficulties arise in constructing a high frequency filter with an acceptable manner of tuning the filter so as to overcome the effects caused on the filter's operations by process variations. Accordingly, there arises a need to address these complexities. This need is achieved by the preferred embodiments described below.
BRIEF SUMMARY OF THE INVENTION
In the preferred embodiment, there is an integrated circuit comprising a filter. The filter comprises an input for receiving an input signal and an output for producing an output signal having a frequency cutoff point. The filter further comprises at least one resistor network coupled between the input and the output. The resistor network comprises a first non-switched resistance and a first resistance series connection connected in parallel with the first non-switched resistance. The first resistance series connection comprises a switched resistance connected in series with a source/drain path of a switching transistor, the switching transistor having a gate for receiving a control signal. The frequency cutoff point is adjustable in response to the control signal. Additionally, the switched resistance has a first resistance and the switching transistor has a on-resistance. Further, the on-resistance is at least 20 percent of the total of the first resistance and the on-resistance. Other aspects are also disclosed and claimed.


REFERENCES:
patent: 3789313 (1974-01-01), Sanderson
patent: 4313089 (1982-01-01), Predina
patent: 5218319 (1993-06-01), Takimoto
patent: 5345119 (1994-09-01), Khoury
patent: 5466976 (1995-11-01), Ichihara
patent: 5966047 (1999-10-01), Anderson et al.

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