Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Reexamination Certificate
2002-03-25
2003-08-05
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
C330S051000, C330S302000, C330S280000
Reexamination Certificate
active
06603359
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a high-frequency power amplifying apparatus including a plurality of series-connected amplifiers, and more particularly, to a high-frequency power amplifying apparatus for delivering, with a reduced loss, the output of that one of the series-connected amplifiers which is selected in accordance with the demanded output power, thereby attaining a high power efficiency.
2. Related Art
The transmission output of a cellular phone is not required to be always maintained at its maximum level, and may be decreased if the distance between the cellular phone and a base station for the other end of the phone line is short. In general circumstances, the cellular phone is operable with stability at a transmission output level which is one-tenth of the maximum level. By decreasing the transmission output in this manner, waste power consumption can be prevented and the best possible use of capacity of a power source secondary battery of the cellular phone can be achieved, to thereby permit the cellular phone to operate for a long time.
To variably control the output of a high-frequency power amplifying apparatus comprised of series-connected amplifiers, one of these amplifiers is selected in accordance with the demanded output power, and the output of the selected amplifier is supplied to the output terminal of the power amplifying apparatus, as described in Japanese provisional patent publication no. 4-260209. Thus, a high-frequency input signal to the power amplifying apparatus is amplified by one or more amplifiers arranged on the upstream side (i.e., pre-stage side) of the selected amplifier and then amplified by the selected amplifier. The resultant amplified signal is delivered from the power amplifying apparatus, bypassing one or more amplifiers arranged on the downstream side (i.e., post-stage side) of the selected amplifier. When the first-stage amplifier is selected so that there is no upstream amplifier for the selected amplifier, the input signal amplified by the first-stage amplifier is delivered from the power amplifying apparatus, bypassing the second- to final-stage amplifiers. When the final-stage amplifier is selected so that there is no downstream amplifier for the selected amplifier, the input signal amplified by the first- to final-stage amplifiers is delivered from the power amplifying apparatus.
As shown by way of example in
FIG. 4
, the high-frequency power amplifying apparatus of this type is comprised of first- and second-stage amplifiers
1
and
2
connected in series with each other, and a switch circuit
3
controlled by a control circuit
5
. The switch circuit
3
is arranged between the output terminal of the first-stage amplifier
1
, the input terminal of the second-stage amplifier, and a bypass circuit that is provided with a half-wavelength delay line (&lgr;g/2 line)
4
and connected to the output terminal
6
b
of the power amplifying apparatus. Reference numeral
6
a
denotes the input terminal of the power amplifying apparatus;
7
a
, a matching circuit disposed between the first-stage amplifier
1
and the switch circuit
3
; and
7
b
, a matching circuit disposed between the second-stage amplifier
2
and the output terminal
6
b.
When a high output power is demanded, the switch circuit
3
is switched to the second-stage amplifier
2
, so that the output of the first-stage amplifier
1
may be amplified by the second-stage amplifier
2
to obtain a high output. When a low output power is requested, the switch circuit
3
is switched to the bypass circuit, so that the output of the first-stage amplifier
1
may be delivered as a low output from the power amplifying apparatus, bypassing the second-stage amplifier
2
.
With this power amplifying apparatus, a high output can be taken from the second-stage amplifier
2
without problems, because a resistance for input signal at the bypass-circuit contact
3
a
becomes large when the switch circuit
3
is connected to the second-stage amplifier
2
to open the contact
3
a
and because the half-wavelength delay line
4
is provided in the bypass circuit.
When the switch circuit
3
is connected to the bypass circuit to obtain a low output power, however, the output impedance of the second-stage amplifier
2
, as viewed from the output terminal
6
b
, has a value which is not negligible with respect to a load (not shown) such as an antenna since the second-stage amplifier
2
is connected to the output terminal
6
b
of the power amplifying apparatus. For this reason, when the switch circuit
3
is connected to the bypass circuit, the second-stage amplifier
2
serves as a load for the first-stage amplifier
1
, causing an increased loss.
Another type of high-frequency power amplifying apparatus is disclosed in Japanese provisional patent publication no. 2000-165164. As shown in
FIG. 5
, this power amplifying apparatus comprises a directional coupler
8
for receiving outputs of first- and second-stage amplifiers
1
and
2
and a terminal switch
9
controlled by a control circuit
5
, so that the isolation terminal
8
a
of the directional coupler
8
may be terminated with a predetermined impedance
9
a
or may be opened or short-circuited by means of the terminal switch
9
, thereby varying the terminal impedance of the directional coupler
8
.
With this power amplifying apparatus, a loss in the directional coupler
5
can be decreased to some extent by causing the isolation terminal
8
a
of the directional coupler
8
to be opened or short-circuited when the switch circuit
3
is connected to the second-stage amplifier
2
to obtain a high output.
However, such an arrangement entails upsizing of the power amplifying apparatus since it includes the directional coupler
8
, and entails an increased loss especially when it delivers a low output since the directional coupler
8
is provided through which the output of each amplifier
1
or
2
is supplied to the output terminal
6
b.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a high-frequency power amplifying apparatus which is simple in construction and which is capable of generating a variable output at a high power efficiency by supplying the output of the desired one of a plurality of series-connected amplifiers, with a reduced loss, to the output terminal of the amplifying apparatus.
A high-frequency power amplifying apparatus according to the present invention comprises: a plurality of amplifiers including at least first- and final-stage amplifiers and connected in series with one another in increasing order of saturation power; an input terminal connected to the first-stage amplifier; an output terminal connected to the final-stage amplifier; a power controller for selectively supplying the output terminal with an output from a desired one of the plurality of amplifiers in accordance with an externally demanded output power and for causing one or more amplifiers downstream of the desired one amplifier to be in a cutoff state when the desired one amplifier is not the final-stage amplifier; and an output delay line connected between the output terminal and the final-stage amplifier and having a line length thereof providing the final-stage amplifier with a high impedance as viewed from the output terminal when the final-stage amplifier is in a cutoff state.
According to the present invention, it is unnecessary to provide a directional coupler between the plurality of amplifiers and the output terminal of the power amplifying apparatus, and accordingly a loss is eliminated which is caused by the directional coupler. Thus, the power efficiency of the power amplifying apparatus can be improved and the power amplifying apparatus can be simplified in construction. In addition, when the output of an arbitrary amplifier disposed upstream of the final-stage amplifier is selectively supplied to the output terminal of the apparatus, the high-impedance output delay line prevents one or more amplifiers, if any, disposed downstream of the arbitrar
Fujiwara Yukinari
Shinomiya Yoshitaka
Frishauf Holtz Goodman & Chick P.C.
Mobile Communications Tokyo Inc.
Shingleton Michael B
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