Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
2001-10-31
2003-08-12
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S133000
Reexamination Certificate
active
06605999
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency power amplifier (high-frequency circuit module), a wireless communication apparatus which incorporates the high-frequency circuit module, and a wireless communication system, and particularly to a wireless communication technique for controlling the output power of a high-frequency power amplifier accurately thereby to perform the communication with a stable output power.
Wireless communication apparatus for mobile telephone and portable telephone incorporate in their transmission output stage a power amplifier formed of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and GaAs-MES (Metal Semiconductor) FETs in cascade connection.
Portable telephone (portable terminal) systems have been generally designed such that each portable unit varies the output power to match with the communication environment in response to the power control signal sent from the base station thereby to prevent crosstalk with other units.
Trends of high-frequency power amplifiers are described in publication “Nikkei Electronics”, pp. 115-126, published by Nikkei BP Corp. on Jan. 27, 1997. The article of this publication covers the standard scheme of the 900 MHz cellular portable telephone in North America and the GSM (Global System for Mobile Communications) in Europe.
Another publication “Hitachi Review”, Vol.79, No.11 (1997), pp.63-68, published by Hitachi Review Corp. includes an article on the high-frequency analog signal processor IC for the digital cellular GSM/EGSM. This publication discloses by block diagram a control scheme of a power amplifier module based on a detected power signal provided by a directional coupler.
SUMMARY OF THE INVENTION
In a digital portable telephone system (cellular telephone system) as shown in
FIG. 17
, a base station
1
sends a power control signal from its antenna
2
to each mobile terminal unit (portable telephone unit)
3
having an antenna
4
so that the unit operates at a minimal transmission power necessary for communication, thereby to prevent crosstalk with other units. The power control signal is either a high-level power signal
5
or a low-level power signal
6
.
The mobile terminal unit includes an automatic power control (APC) circuit, which operates in response to the received power control signal to adjust the output power by varying a power control signal Vapc to be fed to the control terminal of the high-frequency power amplifier of the transmission output stage.
The portable telephone unit is required to have a high output gain and efficiency and, at the same time, a low power consumption at the time of small-power operation. It is difficult to meet these requirements in the entire output power range, and therefore the high-frequency power amplifier is currently designed to switch in its response characteristics between low-power mode and high-power mode across a border power level of about 29 dBm, thereby accomplishing lower power consumption during small-power operation and higher operational efficiency.
FIG.
18
and
FIG. 19
show the circuit arrangement of a 3-stage high-frequency power amplifier including three transistors (MOSFETs: Metal Oxide Semiconductor Field Effect Transistors) in cascade connection. The first-stage transistor (1stTr), second-stage transistor (2ndTr) and third-stage transistor (3rdTr) are all n-channel NMOS transistors.
The power amplifier receives a high-frequency input signal RFin on its input terminal
10
, which is connected to the gate electrode of the transistor 1stTr via a coupling capacitor C
10
. The 1stTr has its drain electrode as output terminal connected via a coupling capacitor C
11
to the gate electrode of the 2ndTr, with the drain electrode as output terminal thereof being connected via a coupling capacitor C
12
to the gate electrode of the 3rdTr (last-stage transistor), with the drain electrode thereof being connected to an output terminal
11
, which releases a high-frequency output signal RFout.
The power amplifier receives on its control terminal
12
a power control signal Vapc, which is delivered to the gate electrodes as control electrodes of the transistors (1stTr,2ndTr and 3rdTr). The 1stTr has its gate electrode biased by the voltage of power control signal Vapc with the rendition of voltage division by resistors R
1
and R
2
, and the 2ndTr has its gate electrode biased by the voltage of Vapc with the rendition of voltage division by resistors R
3
and R
4
.
The 3rdTr has its gate electrode biased by the voltage of Vapc with the rendition of voltage division by resistors R
5
and R
6
having resistance values of 10 k* and 30 k*, respectively, for example, and the further rendition of control by two transistors Q
11
and Q
12
. The transistor Q
11
has its drain electrode connected to the resistor R
6
and its source electrode grounded, and operates for switching. The transistor Q
12
has its gate electrode connected to the drain electrode of the Q
11
, its drain electrode connected to the gate electrode of the 3rdTr, and its source electrode grounded (connected to GND).
The transistors (1stTr,2ndTr and 3rdTr) have their drain electrodes connected to a first reference voltage terminal (power voltage terminal)
13
and supplied with a power voltage Vdd.
When the terminal unit
3
receives a high-level power signal from the base station
1
, the signal turns on the transistor Q
11
, causing the transistor Q
12
to have its gate electrode pulled to GND. Consequently, the 3rdTr operates to have a linear high-mode response as shown in FIG.
2
.
In contrast, a low-level power signal from the base station
1
does not turn on the transistor Q
11
and the transistor Q
12
operates by having on its gate electrode the voltage of the voltage division node of the resistors R
5
and R
6
. Consequently, the 3rdTr operates based on the nonlinear (saturated) low-mode response as shown in FIG.
2
.
On the characteristic graph of
FIG. 2
, input voltage region A is of low-power mode selected by the low-level power signal, and input voltage region B is of high-power mode selected by the high-level power signal.
The inventors of the present invention have devised a bias circuit for making a transition of the 3rdTr gate voltage from the low-power mode to the high-power mode at a high-frequency power level of about 29 dBm, i.e., at a power control signal Vapc of about 1.25 V, and the present invention owes to this technique.
Accordingly, an object of this invention is to provide a high-frequency power amplifier and a wireless communication apparatus which are capable of selecting a high-power mode or low-power mode automatically without using the power control signal sent from the base station.
Another object of this invention is to provide a high-frequency power amplifier which is capable of controlling the output power characteristics accurately.
Still another object of this invention is to provide a wireless communication apparatus which is capable of controlling the output power characteristics accurately, thereby to perform stable communication.
These and other objects and novel features of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings.
Among the affairs of the present invention disclosed in this specification, representatives are briefed as follows.
(1) The inventive wireless communication apparatus comprises a high-frequency power amplifier for transmission, a detection means which measures the output power of the power amplifier, and a power control circuit (automatic power control circuit) which controls the output power of the power amplifier based on information provided by the detection means. The high-frequency power amplifier includes an amplifying system which has multiple amplifying stages and is connected between the input and output terminals, and bias circuits which supply bias voltages to transistors of the respective amplifying stages. The bias circuits, which supply bias voltages to the multiple amplifying stages exc
Adachi Tetsuaki
Akamine Hitoshi
Furuya Tomio
Matsudaira Nobuhiro
Matsushita Kouichi
Hitachi , Ltd.
Miles & Stockbridge P.C.
Mottola Steven J.
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