Amplifiers – With semiconductor amplifying device – Including frequency-responsive means in the signal...
Reexamination Certificate
1999-02-26
2001-01-23
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including frequency-responsive means in the signal...
C330S306000
Reexamination Certificate
active
06177841
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor amplifier comprising, for example, field-effect transistors or bipolar transistors for high frequency amplification, and relates more specifically to a high efficiency amplifier used, for example, in mobile communications devices and microwave band communications devices.
2. Description of the Related Art
B-class amplifiers are commonly used for high frequency power amplifiers in mobile communications devices and microwave band communications devices.
A typical B-class amplifier circuit according to the related art is shown in FIG.
26
. As shown in
FIG. 26
, the source of field-effect transistor (FET)
201
in this amplifier is grounded. A drain bias voltage is applied to the drain of FET
201
via a drain bias line
204
from a drain bias power supply terminal
203
, and a capacitor
202
is inserted between the ground and drain bias power supply terminal
203
. A high frequency signal to be amplified is input to the gate of FET
201
from a signal input terminal
205
. The signal amplified by FET
201
is output through a fundamental wave matching circuit
206
from a signal output terminal
207
. In this B-class amplifier, the gate bias point of the FET
201
is set so that the dc drain current goes to zero.
FIG. 27
is a graph showing the waveforms of the drain current and drain voltage in the FET
201
shown in FIG.
26
. The drain voltage is indicated by a solid line in
FIG. 27
, and the drain current is indicated by a dotted line. Note that the drain voltage has a sine wave shaped waveform, and the drain current has a half-wave rectified waveform. Note, further, that the shaded area indicates power loss.
As will be known from
FIG. 27
, a problem with an amplifier as shown in
FIG. 26
is that power loss occurs, and efficiency therefore drops, when the drain current is greater than zero and the drain voltage is also greater than zero.
It should be further noted that high harmonic processing wherein even harmonics are short circuited and odd harmonics are open circuited is taught in Japanese Patent Laid-Open Publication Nos.7-94974, 8-130424, and 9-246889.
An FET mixer comprising a low pass filter connected between an FET and IF band matching circuit is also taught in Japanese Patent Laid-Open Publication No.2-94908.
SUMMARY OF THE INVENTION
An object of the present invention is therefore to provide a high frequency power amplifier directed to the above-noted problems and specifically capable of reducing power loss and thereby improving operating efficiency.
To achieve the aforementioned object, a high frequency power amplifier for amplifying a high frequency signal according to the present invention comprises an amplifier element for amplifying a high frequency signal, and an output matching circuit for impedance matching the high frequency signal output from an output terminal of said amplifier element. The output matching circuit provides a sufficiently low impedance shorting load to odd harmonics other than the fundamental wave in the high frequency signal, and a sufficiently high impedance open load to even harmonics.
The output matching circuit in an amplifier according to the present invention is comprised so that impedance to odd harmonics is sufficiently low, and impedance to even harmonics is sufficiently high. Power loss can thus be reduced while improving power amplification efficiency.
A high frequency power amplifier according to the present invention further preferably comprises an input matching circuit for impedance matching to a high frequency signal input to an input terminal of the amplifier element. In this case, the reflection coefficient of the input matching circuit seen from the input terminal of the amplifier element is preferably set so that a phase angle of a fundamental wave on a polar chart is within +5° to −75° of a phase angle at which maximum gain is obtained. In other words, the line length of each line in the input matching circuit is adjusted so that the phase of S parameter S
22
(output reflection coefficient) to the fundamental wave is between +5° to −75° of the position at which maximum gain is achieved.
The output impedance matching circuit of the invention is further preferably comprised to impedance match each harmonic in sequence from a high order harmonic of a high frequency signal amplified by the amplifier element. As a result, it is possible to increase reflection of high order harmonics, which tend to contribute to increased loss, and decrease phase change in high order harmonics, which also tend to increase phase change in band.
The output matching circuit of the present invention yet further preferably comprises an odd harmonic matching circuit for creating a short circuit load to at least one odd harmonic of a high frequency signal amplified by the amplifier element; an even harmonic matching circuit for creating an open circuit load to at least one even harmonic of the high frequency signal; and a fundamental wave matching circuit for impedance matching to a fundamental wave of the high frequency signal. In this case, the matching circuits are preferably connected from the output terminal of the amplifier element in sequence from the highest order harmonic to which impedance matching is applied.
With this configuration it is not necessary to consider harmonics of an order higher than the harmonic that is impedance matched by each matching circuit. As a result, matching circuit design is simplified. It is also possible to increase reflection of high order harmonics, which tend to contribute to increased loss, and decrease phase change in high order harmonics, which also tend to increased phase change in band.
Further preferably, the reflection coefficient of the odd harmonic matching circuit is set so that a phase angle of an odd harmonic observed on a polar chart is in the range 160° to 220° when the output matching circuit is seen from the output terminal of the amplifier element.
In this case, the odd harmonic matching circuit further preferably comprises a bias line for supplying a bias voltage from an external source to the amplifier element output terminal, and the length of this bias line is set so that a phase angle of the odd harmonic is a desired value.
The output matching circuit further preferably comprises a low pass filter disposed between each matching circuit. When designing the odd harmonic matching circuit, even harmonic matching circuit, and fundamental wave matching circuit in this case, it is not necessary to consider harmonics of an order higher than that impedance matched by the specific matching circuit. Matching circuit design and adjustment are thus simple.
The odd harmonic matching circuit further preferably comprises at least one resonance circuit of a capacitor and parasitic inductor where the resonance circuit resonates at a frequency of an odd harmonic. In this case, impedance to an odd harmonic when the output matching circuit is seen from the amplifier element can be set to a desired value near zero. If the odd harmonic matching circuit comprises a plurality of resonance circuits, high efficiency operation can be achieved over a wide band.
Yet further preferably, the capacitor of the resonance circuit is disposed proximally to the amplifier element output terminal. As a result, a low inductance parasitic inductor and a high capacitance capacitor can be used in the resonance circuit of the odd harmonic matching circuit. As a result, high efficiency operation can be achieved over a wide band.
The even harmonic matching circuit further preferably comprises at least one resonance circuit of a capacitor and parasitic inductor where the resonance circuit resonates at a frequency of an even harmonic, and a signal line for connecting this resonance circuit and the odd harmonic matching circuit. In this case, the range of high efficiency operation with even harmonics is wide even when a low capacitance capacitor is used in the resonance circuit of the even harmonic matc
Heima Tetsuya
Inoue Akira
Ohta Akira
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Khanh Van
Pascal Robert
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