High frequency oscillator

Details High frequency oscillator High frequency oscillator

2001-06-22

2003-04-15

Lam, Tuan T. (Department: 2816)

Oscillators

Ring oscillators

C331S018000, C327S148000, C327S149000

Reexamination Certificate

active

06549082

ABSTRACT:

BACKGROUND
The present invention relates to a high frequency oscillator comprising a phase-locked loop (PLL), providing a tuned frequency range in the 5 to 6 GHz band.
Today, there are various activities to establish new wireless services in the 5 to 6 GHz band, e. g. European Hyperlan2 and IEEE 802.11a in the United States. As a consequence, a high demand for integrated oscillators and I/Q generation circuits exists, comprising a good phase noise.
High frequency oscillators using a phase-locked loop are well known in literature, for example from “Theorie und Anwendungen des Phase-Locked Loops”, Roland Best, in “Der Elektroniker, No. 6/1975. A high frequency oscillator with a phase-locked loop comprising a phase frequency detector, a charge pump with a filter, a voltage control oscillator and a divider, the high frequency oscillator being controlled by a reference frequency, is known from Mehmet Soyuer et al.: “A FULLY MONOLITHIC 1.25 GHZ CMOS FREQUENCY SYNTHESIZER” Symposium on VLSI Circuits, US, New York, IEEE, Jun. 9, 1994, pages 127-128, ISBN: 0-7803-1919-2, also from Buchwald et al.: “A 6 GHZ INTEGRATED PHASE-LOCKED LOOP USING ALGAAS/GAAS HETEROJUNCTION BIPOLAR TRANSISTORS”, IEEE Journal of Solid State Circuits, US, IEEE Inc. New York, Vol. 27, No. 12, 01.12.1992, pages 1752-1762, XP000329025, and Novof et al.: “Fully integrated CMOS phase-locked loop with 15 to 240 MHz locking range and 50 ps jitter”, IEEE Journal of Solid State Circuits, US, IEEE Inc New York, Vol. 30, No. 11, 01.11.1995, pages 1259-1266, XP000553064. A further reference, relating to a fully integrated oscillator in the GHz range and to a ring oscillator, is Pottbaecker and Langmann: “AN 8 GHZ SILICON BIPOLAR CLOCK-RECOVERY AND DATA-REGENERATOR IC”, IEEE Journal of Solid-State Circuits, IEEE, December 1994, Vol. 29, pp. 1572-1576.
The object of the present invention is therefore to provide a high frequency oscillator with a good phase noise in the 5 to 6 GHz band, which allows especially a cost effective integration on an IC.
SUMMARY OF THE INVENTION
The high frequency oscillator of the invention comprises a reference oscillator and a phase-locked loop circuit with a phase frequency detector, a charge pump, a ring oscillator and a divider, the reference oscillator being coupled to the phase frequency detector for frequency control. The reference oscillator works advantageously in the range of 1.25-1.5 GHz and is a Colpitts type digital controlled frequency synthesizer with an external tank circuit for providing low phase noise, and the dividing factor of the divider is four for providing a tuned output range of 5 to 6 GHz. The ring oscillator is a symmetrical delay cell oscillator containing two delay cell amplifiers, which provide advantageously ground-free I/Q output signals, having a very low phase noise due to the phase-locked loop.
The phase-locked loop circuit is integrated together with the reference oscillator into an integrated circuit, using advantageously a BICMOS Silicon/Germanium process, which is well suited for RF applications. The tank circuit of the reference oscillator and the loop filter of the charge pump are external to the integrated circuit. Advantageous embodiments, especially relating to the charge pump and to the ring oscillator, are set up in the subclaims and are explained in the further description.


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Mehmet Soyuer et al. “A fully monolithic 1.25GHz CMOS Frequency Synthesizer”, Symposium on VLSI Circuits, US, NY, IEEE, Jun. 9, 1994 pp 127-128. XP000501055.
Buchwald et al. “A 6-GHz Integrated Phase-Locked Loop Using AlGaAS/GaAs Heterojunction Bipolar Transistors” IEEE Journal of Solid-State Circuits, US, IEEE vol. 27, No. 12, Dec. 1, 1992, pp. 1752-1762, XP000329025.
Novof et al. “Fully integrated CMOS phase-locked loop with 15 to 240 MHZ locking range and 50 ps jitter”, IEEE Journal of solid-state circuits, IEEE, vol. 30, No. 11, Nov. 1, 1995, pp. 1259-1266, XP000553064.

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