High frequency noise and impedance matched integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area

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257565, 257567, 257568, 257569, 257570, H01L 27082

Patent

active

057897999

ABSTRACT:
An monolithic integrated circuit comprising a transistor-inductor structure is provided having simultaneously noise matched and input impedance matched characteristics at a desired frequency. The transistor-inductor structure comprises a first transistor Q.sub.1 which may be a common emitter bipolar transistor or common source MOSFET transistor Q.sub.1, a second optional transistor Q.sub.2, a first inductor L.sub.E in the emitter (source) of Q.sub.1, and a second inductor L.sub.B in the base (gate) of Q1. The emitter length l.sub.E1, or correspondingly the gate width w.sub.g, of Q1 is designed such that the real part of its optimum noise impedance is equal to the characteristic impedance of the system, Z.sub.0, which is typically 50.OMEGA.. The first inductor L.sub.E, provides matching of the real part of the input impedance and the second inductor L.sub.B cancels out the noise reactance and input impedance reactance of the structure. The resulting simultaneously noise and impedance matched integrated circuit provides optimal performance. The optimized transistor-inductor structure has particular application to silicon integrated circuits, such as low noise amplifiers and mixer circuits, for wireless and RF circuit applications at 5.8 Ghz, previously reported only for GaAs based circuits. Other basic silicon integrated circuits were optimized at frequencies up to .about.12 GHz.

REFERENCES:
patent: 4928314 (1990-05-01), Grandfield et al.
patent: 4980810 (1990-12-01), McClanahan et al.
patent: 5164682 (1992-11-01), Taralp
K.K. Ko et al, "A comparative study on the various monolithic low noise amplifier circuit topologies for RF and microwave Applications" IEEE J. Solid State Circuits vol. 31, No. 8, Aug. 1996, pp. 1220-1225.
F. McGrath et al, in "A 1.9GHz GaAs Chip set for the personal handyphone system", IEEE Trans. MTT vol 43, pp. 1733-1744.
A. Brunel, et al, in "A Downconverter for use in a dual mode AMPS/CDMA chip set", in Microwave J., pp. 20-42, Feb. 1996.
S. Voinigescu, et al "A scaleable high frequency noise model for bipolar transistors with application to optimal transistor sizing for Low noise amplifier design" to be published at the Bipolar Circuits and Technology Meeting, 30 Sep. 1996.

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