Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated...
Reexamination Certificate
2002-03-27
2004-05-25
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
C257S500000, C257S501000, C257S506000, C257S751000
Reexamination Certificate
active
06740953
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to closely spaced circuits each of which should never be carelessly coupled to each other at high frequency, and more specifically to a high frequency integrated device having an element isolation region formed by trench isolation.
BACKGROUND OF THE INVENTION
In recent years, as solutions for technical problems of an element isolation structure formed by LOCOS isolation, many methods of trench isolation (referred to as V-trench or U-trench isolation depending upon the shape of a trench) have been proposed, in which a deep trench is provided in a region for forming a LOCOS oxidation film of a semiconductor substrate and insulator fills the trench. Further, a method for filling a conductive material in a trench also has been proposed.
As shown in
FIG. 18
, in a method for isolating an element that uses trench isolation of a first conventional art (Japanese Patent Laid-Open No. 8-172124), an insulator
104
, which is embedded into a trench
102
formed on a substrate
101
, protrudes from a surface of the substrate
101
on a trench upper part
103
and extends with an opening size width or more of the trench
102
. At least both sides
103
a
are chamfered or formed into segments, and the insulator
104
filling the trench
102
includes a region of a conductive material
105
(polysilicon is a representative material, and doped polysilicon is also applicable).
Moreover, as shown in
FIG. 19
, in a second conventional art (Japanese Patent Laid-Open No. 2000-269319), embedded wiring
204
is partially embedded by an insulator
203
in a trench
202
formed on a substrate
201
.
Also, as shown in
FIG. 20
, in a third conventional art (Japanese Patent Laid-Open No. 7-273288), a trench
302
is formed on the circumference of a predetermined circuit element formed on a substrate
301
, an insulator
304
and a polysilicon resistor
303
used for element isolation are embedded in the trench
302
, and a contact is formed for wiring on a predetermined position in the trench
302
, so that the trench
302
is used as a resistor.
Additionally, as shown in
FIG. 21
, in a fourth conventional art (Japanese Patent Laid-Open No. 5-29603), an element isolation trench
402
and a power supply trench
403
are formed on a substrate
401
, the substrate
401
is exposed at the bottom of the power supply trench
403
, tungsten
404
is embedded by selective vapor growth, a non-doped polysilicon
405
is simultaneously embedded in the remaining part of the power supply trench
403
and in the element isolation trench
402
, a polysilicon film
406
, which is doped with a high concentration, is formed on polysilicon
405
in the power supply trench
403
, and the substrate
401
is subjected to heat treatment so as to form power supply wiring
407
.
Meanwhile, LSI with a SiG-BiCMOS (Silicon Germanium-Bipolar-CMOS) structure has been developed in recent years. In such LSI, a bipolar transistor, which uses Silicon Germanium for a base layer and can perform a superhigh frequency operation, and an MIS transistor such as a CMOS transistor, which has a high packaging density with small power consumption, are formed on the same substrate, so that highly integrated LSI can be achieved at high speed with low power consumption. When SiGeBiCMOS is used in a region whose handling frequency exceeds gigahertz[GHz], conventional isolating methods cannot obtain high-frequency isolation under present circumstances.
When a circuit handles a higher frequency, a coupling degree in an electromagnetic field is increased between apart regions due to parastic capacitances and radiation. Namely, unnecessary interference occurs between function blocks (circuits), resulting in serious influence on the capability of circuits. In order to obtain high-frequency (electromagnetic) separation (isolation), interruption needs be provided so as to set a potential to 0 at high frequency between regions (circuits).
To be specific, in the method of the first conventional art, the included conductive material
105
is grounded by making contact with the substrate
101
having a fixed potential. However, since the substrate
101
is a resistor, resistance exists between the conductive material
105
and ground through the substrate
101
. Hence, a potential of the conductive material
105
is not stabilize for high frequency, so that high-frequency isolation cannot be obtained in regions
101
A and
101
B on the sides of the trench
102
.
Further, in the method of the second conventional art, the wiring
204
is embedded in the trench
202
. The wiring
204
is not always connected to a high frequency ground (RF ground) that has a stabilized potential such as a power supply, ground and the like. Even if the wiring
204
is connected to RF ground, the wiring
204
does not entirely cover the trench
202
. Thus, even if the wiring
204
is used for high-frequency isolation, high-frequency isolation cannot be obtained in regions
201
A and
201
B on the sides of the trench
202
.
Besides, in the method of the third conventional art, the polysilicon resistor
303
is used in the trench
302
. A potential is not stabilized because of the resistance of the polysilicon resistor
303
, and like the first conventional art, an electromagnetic wave is not terminated on the polysilicon. Hence, high-frequency interruption cannot be achieved.
Additionally, in the method of the fourth conventional art, like the first conventional art, since the substrate
401
is not a perfect conductor, there exists resistance between the tungsten
404
and the substrate
401
. Since the polysilicon film
406
also has R (resistance) serving as a resistor, a potential on the polysilicon is not stabilized.
In this manner, although the conventional methods are configured such that a conductive material fills a trench to improve isolation characteristics, sufficient isolation cannot be obtained in a high frequency region whose handling frequency exceeds gigahertz[GHz] under present circumstances.
The present invention has as its object the provision of a high frequency integrated device which can achieve sufficient isolation even in a high frequency region whose handling frequency exceeds gigahertz[GHz] in the formation of a trench isolation structure for filling a conductive material in a trench.
DISCLOSURE OF THE INVENTION
A high frequency integrated device according to claim 1 of the present invention is characterized in that it comprises a semiconductor substrate having a trench formed therein, the trench being filled inside thereof, via an insulating film, with a conductive material having lower resistance than that of the insulating film, the conductive material being grounded through coupling at high frequency. Here, to be grounded through coupling at high frequency may be paraphrased as to be connected to a point potentially stabilized at high frequency. That is, the conductive material is connected to a potentially stabilized conductor such as ground and power supply.
A high frequency integrated device according to claim 2 of the present invention is characterized in that in claim 1, the conductive material is directly connected to a potentially stabilized conductor formed of a conductive substance.
A high frequency integrated device according to claim 3 of the present invention is characterized in that in claim 1, the conductive material is connected to a ground conductor formed of a conductive substance via a capacitance that is sufficient to make a short circuit at a handling frequency. That is, the conductive material is connected to a potentially stabilized conductor.
A high frequency integrated device according to claim 4 of the present invention is characterized in that in claims 1 to 3, an insulating film comprising one or more layers is formed on a side wall and a bottom of the trench.
A high frequency integrated device according to claim 5 of the present invention is characterized in that in claims 1 to 4, an impurity region is formed on the side wall and the periphery
Fenty Jesse A.
Parkhurst & Wendel L.L.P.
Thomas Tom
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