Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For high frequency device
Reexamination Certificate
2001-07-17
2003-04-29
Graybill, David E. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For high frequency device
C257S786000
Reexamination Certificate
active
06555907
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high-frequency integrated circuit operated in a high-frequency band, particularly, a millimeter-wave region of 30 GHz or more, and a high-frequency circuit device using the same.
2. Background Art
FIG. 25
is a plan view showing a conventional SP3T (Single Pole 3 Throw) switch MMIC (Monolithic Microwave IC) chip.
In
FIG. 25
, reference numeral
300
indicates an SP3T switch MMIC chip, reference numeral
302
indicates a GaAs substrate, and reference numeral
304
indicates a switching element, which are respectively typically illustrated. Reference numerals
306
indicate grounding pads, and reference numeral
308
indicates an RF input pad. An RF input terminal
310
comprises the RF input pad
308
and the grounding pads
306
provided on both sides thereof.
Reference numerals
312
a
,
312
b
and
312
c
respectively indicate RF output pads. An RF output terminal
314
comprises the RF output pad
312
a
and the grounding pads
306
provided on both sides thereof, an RF output terminal
316
comprises the RF output pad
312
b
and the grounding pads
306
provided on both sides thereof, and an RF output terminal
318
comprises the RF output pad
312
c
and the grounding pads
306
provided on both sides thereof, respectively. Reference numerals
320
indicate wiring layers.
FIG. 26
is a typical view showing the state of measurement of an S parameter indicative of a pass characteristic between the RF input terminal
310
and the RF output terminal
314
of the SP3T switch MMIC chip
300
(hereinafter called a-path).
In
FIG. 26
, reference numerals
322
indicate probe heads each having a G-S-G (Ground-Signal-Ground) structure, and reference numerals
324
indicate probes.
Of the probes
324
provided at the tip of each probe head
322
, the probe for a signal terminal is placed in the center thereof, and grounding probes are disposed on both sides thereof with the probe interposed therebetween. Pads having G-S-G (Ground-Signal-Ground) structures for the RF input terminal
310
and RF output terminals
314
,
316
and
318
of the MMIC chip
300
are formed with pitches matched with the probes
324
.
As shown in
FIG. 26
, the two probe heads
322
are used to measure the S parameter indicative of the pass characteristic between the RF input terminal
310
and the RF output terminal
314
and disposed so as to be opposed to each other. The RF input terminal
310
and the RF output terminal
314
are brought into contact with their corresponding probes
324
to measure the S parameter.
FIG. 27
is a typical view showing the state of measurement of an S parameter indicative of a pass characteristic between the RF input terminal
310
and the RF output terminal
316
of the SP3T switch MMIC chip
300
(hereinafter called b-path). Further,
FIG. 28
is a typical view showing the state of measurement of an S parameter indicative of a pass characteristic between the RF input terminal
310
and the RF output terminal
318
(hereinafter called c-path) of the MMIC chip
300
.
In
FIGS. 27 and 28
, the probe heads
322
brought into contact with the RF input terminal
310
remain unchanged in position/direction. However, the probe heads
322
brought into contact with the RF output terminals
316
and
318
change not only in position but in direction as compared with the probe head
322
brought into contact with the RF output terminal
314
.
When S parameters indicative of pass characteristics of an SP3T switch are measured, it is normally necessary to measure all S parameters for the a-path, b-path and c-path. In regard to each individual measurements, the probe heads
322
respectively brought into contact with the RF input terminals
310
are all identical in position and orientation, whereas the probe heads
322
respectively brought into contact with the RF output terminals
314
,
316
and
318
are all different from one another in position and orientation.
Namely, the probe head
322
is placed in a left position in a rightward direction in
FIG. 26
upon the a-path measurement. The probe head
322
is placed in an upper position in a downward direction in
FIG. 27
upon the b-path measurement. The probe head
322
is placed in a lower position in an upward direction in
FIG. 28
upon the c-path measurement.
Therefore, the respective path measurements need to re-construct and correct a measurement system. The following problems arise.
(1) A probe head for a W band is extremely expensive (about million yen/piece) and apt to wear. The number of contacts indicative of its lifetime ranges from one hundred thousand to one million. Wastage corresponding to 1 to 10 yen per contact occurs. Corrections are required each time the respective paths are changed, and at least six contacts are required upon the respective corrections. Therefore, the probe head rapidly wears when the orientation of the probe head is repeatedly changed.
(2) Since a measuring instrument and a calibration measurement standard respectively have a generally left-to-right measuring structure, they are complex in connection and reduced in measuring accuracy in the case of bend paths, i.e., b-path and c-path.
(3) The change of the orientation of each probe head is made according to manipulator's changes on a prober. Since, however, difficult manual work is accompanied by this change work, undesired situations such as a frequent drop of the probe head and a contact between each probe at the tip of the probe head and another member are apt to occur, thus causing damage to the expensive probe head frequently.
SUMMARY OF THE INVENTION
The present invention has been made with a view toward solving the above-described problems. A first object of the present invention is to provide a high-frequency integrated circuit capable of carrying out a high-frequency characteristic evaluation easily, highly accurately, in a short time and at low cost. A second object of the present invention is to provide an inexpensive and high-reliable high-frequency circuit device using such a high-frequency integrated circuit.
While Japanese Patent Laid-Open No. 9-14850 describes a pad layout which enables testing to be facilitated, it relates to the efficient arrangement of pads, which is suitable for a lead-on-chip structure. This disclosure does not describe that signal input/output ports each configured with a signal pad and grounding pads as one set are disposed such that the directions of arrangements of the signal pad and grounding pads extend parallel to one another.
According to one aspect of the present invention, a high-frequency integrated circuit comprises a semiconductor substrate, a first circuit element disposed on the semiconductor substrate and having a plurality of signal terminals, a first connecting port disposed on the semiconductor substrate and having a first signal pad connected to the first circuit element and grounding pads adjacent to the first signal pad, a second connecting port disposed on the semiconductor substrate and having a second signal pad connected to the first circuit element and grounding pads adjacent to the second signal pad in parallel with the direction of an arrangement of the first signal pad and the grounding pads of the first connecting port, and a third connecting port disposed on the semiconductor substrate and having a third signal pad connected to the first circuit element and grounding pads adjacent to the third signal pad in parallel with the direction of the arrangement of the first signal pad and the grounding pads of the first connecting port.
According to another aspect of the present invention, a high-frequency circuit device comprises a conductive mounting substrate, dielectric substrates disposed on the conductive mounting substrate and having surfaces on which signal lines are disposed, a high-frequency integrated circuit disposed on the conductive mounting substrate and comprising a semiconductor substrate, a first circuit element disposed on the semiconductor substrate and having a p
Graybill David E.
Leydig , Voit & Mayer, Ltd.
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