High frequency divider state correction circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

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Details

C327S117000

Reexamination Certificate

active

07453293

ABSTRACT:
The present invention provides for a self-correcting state circuit. A first flip flop is configured to receive a clock input and a first data input, and to generate a first output in response to the clock input and the first data input. A second flip flop is coupled to the first flip flop and configured to receive the clock input and to receive the first output as a second data input, and to generate a second output in response to the clock input and the first output. A first correction circuit is coupled to the second flip flop and configured to generate a corrected output. A third flip flop is coupled to the first correction circuit and configured to receive the clock input and to receive the corrected output as a third data input, and to generate a third output in response to the clock input and the third data input.

REFERENCES:
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patent: 3609391 (1971-09-01), Hatano et al.
patent: 4442748 (1984-04-01), Kaneko et al.
patent: 4691331 (1987-09-01), Bayruns et al.
patent: 4993051 (1991-02-01), Feldbrugge et al.
patent: 5339345 (1994-08-01), Mote, Jr.
patent: 6531903 (2003-03-01), Wichman
patent: 6826250 (2004-11-01), Groo
patent: 2002/0114422 (2002-08-01), Ishiwaki

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