Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
2007-03-13
2007-03-13
Khatri, Anil (Department: 2191)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
C717S104000, C708S236000
Reexamination Certificate
active
10455216
ABSTRACT:
A high-frequency compound instruction mechanism and method allows performing a common compare immediate function before an add function has completed, thereby reducing the number of cycles to perform the add-compare function. By increasing the speed of performing the add-compare function, a branch mispredict signal may be provided to an instruction pipeline before data registers are affected by the pipelined instructions. The compound instruction mechanism of the preferred embodiments may be implemented within space that is primarily unused within arithmetic logic units, resulting in an implementation that only marginally increases space requirements on an integrated circuit.
REFERENCES:
patent: 5450555 (1995-09-01), Brown et al.
patent: 5734879 (1998-03-01), Gallup et al.
patent: 5734880 (1998-03-01), Guttag et al.
patent: 5867712 (1999-02-01), Shaw et al.
patent: 5892936 (1999-04-01), Tran et al.
patent: 5926643 (1999-07-01), Miura
patent: 6088511 (2000-07-01), Hardwick
patent: 6240508 (2001-05-01), Brown et al.
patent: 6366998 (2002-04-01), Mohamed
patent: 6609189 (2003-08-01), Kuszmaul et al.
patent: 6880150 (2005-04-01), Takayama et al.
patent: 6976245 (2005-12-01), Takayama et al.
patent: 7028107 (2006-04-01), Vorbach et al.
patent: 7047394 (2006-05-01), Van Dyke et al.
Parashar et al, “A complexity effective approach to ALU bandwidth enchancement for instruction level temporal redundancy”, IEEE ISCA, vol. 32, isse 2, pp. 1-11, 2004.
Rotenberg et al, “Traces Processors”, IEEE, pp. 138-148, 1997.
Ergin et al, “register Packing Exploring narrow width operands for reducing register file pressure”, IEEE MICRO pp. 1-12, 2004.
Sakai et al, “An architecture of a dataflow single chip processor”, ACM pp. 46-53, 1989.
Khatri Anil
Martin Derek K.
Martin & Associates
LandOfFree
High frequency compound instruction mechanism and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High frequency compound instruction mechanism and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High frequency compound instruction mechanism and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3801602