High frequency compensation circuit for high frequency...

Amplifiers – With semiconductor amplifying device – Including signal feedback means

Reexamination Certificate

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C330S311000

Reexamination Certificate

active

06577197

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and apparatus for compensating high-speed class AB amplifiers. More specifically, the present invention is directed to improving the frequency response of a class AB amplifier by properly arranging a current mirror circuit to cooperate with the input stage of the amplifier.
BACKGROUND OF THE INVENTION
A two-stage amplifier includes an input stage that is connected to an output stage. The input stage provides a first stage of signal gain, while the output stage is arranged to increase power output to drive a desired load. A cascode amplifier may be employed in the input stage of the amplifier. A class AB amplifier may be used in an output stage by appropriately arranging PNP and NPN transistors.
The cascode amplifier includes a first transistor that is connected in series with a second transistor. An input signal is coupled to the base of the first transistor. The collector of the first transistor is connected to the emitter of the second transistor, where the second transistor is arranged as a cascode device. The gain of the cascode amplifier is determined by the ratio of the impedance of the emitter of the first transistor to the impedance of the collector of the second transistor. A parasitic capacitance associated with the collector of the second transistor limits the high frequency response of the cascode amplifier. The frequency response of the cascode amplifier can be extended by introducing a capacitor at the emitter of the lower cascode transistor.
SUMMARY OF THE INVENTION
The present invention relates to a method and apparatus for compensating high-speed class AB amplifiers. More specifically, the present invention is directed to improving the frequency response of a class AB amplifier stage by arranging a current mirror circuit in conjunction with the input stage of the amplifier.
Briefly stated, a method and apparatus are directed to an improved cascode amplifier. The cascode amplifier includes a cascode input stage that provides a first current in response to an input signal. A second current is also provided in response to the input signal, where the second current is a scaled and smaller version of the first current. The second current is low-pass filtered using parasitic capacitance present in a current mirror. A delayed mirrored current is applied to the emitters of the lower cascode transistor circuit to provide negative feedback. The current mirror amplifies the effect of the parasitic capacitance in the low-pass filter. An output node of the cascode amplifier has an associated parasitic capacitance. The parasitic capacitance at the output node in the cascode amplifier is compensated for by proper arrangement of the parasitic capacitance in the current mirror, such that the cascode amplifier is useful at higher frequencies. The improved cascode amplifier is suitable for monolithic integration.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrative embodiments of the invention, and to the appended claims.


REFERENCES:
patent: 5469093 (1995-11-01), MacDonald
patent: 6028640 (2000-02-01), Nayebi et al.
patent: 6163211 (2000-12-01), Morrish
patent: 6340918 (2002-01-01), Taylor
“Television Engineering Handbook,” K. Blair Benson, rev. by Jerry C. Whitaker, pp. 13.156-13.157 1992.
“PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC comb filter, VBI-data slicer and high performance scaler SAA7114H,” Phillips Semiconductors, p. 27, Mar. 15, 2000.
“VPC 323xD Comb Filter Video Processor Preliminary Data Sheet,” Micronas, p. 16, Edition Jul. 26, 2001.

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