High frequency CMOS differential amplifiers with fully...

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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C330S256000

Reexamination Certificate

active

06583667

ABSTRACT:

RELATED PATENT APPLICATION
IME2000-020, A GAIN COMPENSATION CIRCUIT FOR CMOS AMPLIFIERS, title filing date: Aug. 22, 2001, Ser. No. 09/933,964, assigned to a common assignee.
IME2000-021, GENERAL-PURPOSE TEMPERATURE COMPENSATING CURRENT MASTER-BIAS CIRCUIT, title filing date: Oct. 24, 2001, Ser. No. 09/999,001, assigned to a common assignee.
IME2001-003, HIGH FREQUENCY CMOS FIXED AND VARIABLE GAIN AMPLIFIERS, title filing date: Nov. 9, 2001, Ser. No. 10/036,597, assigned to a common assignee.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to high frequency, variable gain, differential amplifiers, and more particularly to the design of a high frequency, variable gain CMOS amplifier with a linear-in-dB gain control characteristic, compensated for temperature and fabrication process variations.
2. Description of the Related Art
Circuits for high frequency, variable gain, differential amplifiers were previously designed in bipolar technology. The well-defined and well-known input voltage to output current characteristic of the bipolar device makes the circuit design relatively easy. However, MOS characteristics are not so well-defined and are relatively difficult to use in circuit designs. However, CMOS designs are much preferred because of the advantages in fabrication. There are some CMOS differential amplifier designs in the literature which address one or the other aspect of compensating for variations in bias, gain, or temperature, but none address all those aspects together.
Related U.S. Patents referring to differential amplifier with compensation are:
U.S. Pat. No. 6,259,321B1 (Song et al.) discloses a CMOS variable gain multi-stage amplifier with linear-in-dB and variable gain control.
U.S. Pat. No. 6,127,890 (Shimomura et al.) teaches the use of a first differential amplifier with a gain proportional to a control voltage in a low region of the control voltage, and a second differential amplifier with a gain proportional to a control voltage in a high region of the control voltage. Both amplifiers are bipolar, however.
U.S. Pat. No. 6,011,437 (Sutardja et al.) shows a multi-stage high bandwidth, variable gain amplifier where the gain of each stage is controlled individually.
U.S. Pat. No. 5,880,631 (Sahota) describes a multi-stage low power, high dynamic range, variable gain amplifier, where the amplifier proper uses bipolar transistors.
U.S. Pat. No. 4,816,772 (Klotz) discloses a single input, bipolar AGC amplifier with multiple stages and applies a linearization control voltage to each stage.
U.S. Pat. No. 4,459,555 (Jett, Jr.) presents a CMOS variable gain differential amplifier in which the signal level is gain controlled in response to a control voltage without varying the d-c conditions.
U.S. Pat. No. 6,297,698B1 (Callahan, Jr.) teaches a variable differential gain amplifier where the gain is regulated by a three input comparator.
U.S. Pat. No. 6,271,726 (Fransis et al.) shows bipolar variable gain single input amplifier which has temperature, digital slope, and offset control.
The problem is to design a variable gain amplifier for high frequency applications in CMOS technology where gain is to be varied with a control voltage and where the variation in the gain must follow a linear-in-dB characteristic. The gain characteristic also needs to be compensated for temperature and fabrication process variations. It should be noted that none of the above cited U.S. Patents have been able to address all of the above cited requirements. The present invention discloses circuits which meet those requirements.
SUMMARY OF THE INVENTION
It is an object of at least one embodiment of the present invention to provide a variable gain amplifier for high frequency applications in CMOS technology where gain is to be varied with a control voltage and where the variation in the gain must follow a linear-in-dB characteristic.
It is another object of the present invention to provide for a gain characteristic which is compensated for temperature and fabrication process variations.
It is yet another object of the present invention to provide an amplifier with automatic gain control (AGC).
It is still another object of the present invention to provide an amplifier where the gain can be trimmed and adjusted for any desired accuracy.
It is a further object of the present invention is to provide a linear-in-dB characteristic which is compensated for both temperature and process variations.
It is yet a further object of the present invention is to provide a high frequency amplifier which overcomes problems due to transistor mismatches.
These and many other objects have been achieved by a high frequency CMOS differential amplifier which comprises:
a high frequency variable gain amplifier, either direct or capacitor coupled, which may contain more than two stages, and which amplifies a first and a second input signal In
1
and In
2
, where the gain of the amplifier depends on a first and a second bias current I
B1
and I
B2
.
A temperature sensing circuit which provides a band-gap plus proportional-to-absolute-temperature (PTAT) dependent current I
PTAT
, and a temperature independent first and second reference current I
REF1
and I
REF2
.
A gain-slope correction circuit which receives a first and a second control voltage V
CONT
(the DC control voltage) and V
COM
(the analog common), respectively, I
REF1
, and I
PTAT
and which produces an intermediate control voltage V
CT
as a function of temperature by digitally comparing I
REF1
and I
PTAT
, thereby compensating for a change in slope of the gain control characteristics with temperature of the high frequency variable gain amplifier.
A gain compensation circuit which receives I
REF2
and generates a biasing current I
B
which is modulated to compensate for the gain of the high frequency variable gain amplifier using a differential and an operational amplifier.
A bias control circuit which receives V
CT
and V
COM
and divides I
B
into I
B1
and I
B2
by comparing V
CT
against reference voltages V
R
, which are generated from V
COM
.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.


REFERENCES:
patent: 4459555 (1984-07-01), Jett, Jr.
patent: 4816772 (1989-03-01), Klotz
patent: 5030924 (1991-07-01), Fritz
patent: 5159288 (1992-10-01), Ito
patent: 5880631 (1999-03-01), Sahota
patent: 6011437 (2000-01-01), Sutardja et al.
patent: 6020786 (2000-02-01), Ashby
patent: 6124761 (2000-09-01), Robinson et al.
patent: 6127890 (2000-10-01), Shimomura et al.
patent: 6259321 (2001-07-01), Song et al.
patent: 6271726 (2001-08-01), Fransis et al.
patent: 6297698 (2001-10-01), Callahan, Jr.
patent: 6369618 (2002-04-01), Bloodworth et al.

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