High-frequency CCD adder and multiplier

Details High-frequency CCD adder and multiplier High-frequency CCD adder and multiplier

1976-02-26

1977-06-28

Ruggiero, Joseph F.

Boots, shoes, and leggings

364841, 307221C, 307221D, 357 24, G06G 716, H03K 5159

Patent

active

040327671

ABSTRACT:
A device for implementing the arithmetic operations of addition and multication utilizing CCD concepts and MOSFET properties. First and second CCD channels convert first and second input voltages into first and second charge quantities, respectively. The first and second charge quantities are added in a third CCD channel to provide a third charge quantity linearly proportional to the sum of the first and second input voltages. The three charge quantities are sensed by three floating gate amplifiers operated in the saturation region. The outputs of the floating gate amplifiers are subsequently combined by a differential amplifier, the output of which is linearly proportional to the product of the first and second input voltages.

REFERENCES:
patent: 3809923 (1974-05-01), Esser
patent: 3931510 (1976-01-01), Kmetz
patent: 3935439 (1976-01-01), Buss et al.
patent: 3952188 (1976-04-01), Sloate et al.
patent: 3956624 (1976-05-01), Audaire et al.

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