Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
2007-05-29
2009-12-01
Shingleton, Michael B (Department: 2815)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S306000, C455S232100, C455S234100
Reexamination Certificate
active
07626459
ABSTRACT:
A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.
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Japanese Office Action dated May 9, 2006 with English translation.
Inamori Masahiko
Motoyoshi Kaname
Nakayama Masao
Takagi Tsunehiro
Dickinson Wright PLLC
Panasonic Corporation
Shingleton Michael B
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