High forward current gain bipolar transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Plural non-isolated transistor structures in same structure

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Details

257593, 257110, 257163, 257167, H01L 27082

Patent

active

059593440

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to a semiconductor bipolar transistors and, more particularly, to high-forward-current-gain transistors.
2. Prior Art
One of the most important parameters of semiconductor bipolar transistor in common-emitter configuration under stationary and normal-operating conditions is forward current gain. It is well-known that this parameter is inversely proportional to the flow F.sub.1 of the charge carriers injected from the base region into the emitter region where these carriers are minority. This flow is usually directly proportional to the flow F.sub.2 of the above minority carriers from the emitter region into the emitter-contact body. In particular, it forms the basis of the most popular technique to increase forward current gain in silicon and silicon-base homojunction or heterojunction transistors by means of decreasing flow F.sub.2.
This technique applies polysilicon instead of metal as a material for the emitter contact. It usually increases the forward current gain by at least several times. A more noticeable improvement is achieved by application of a very thin interfacial dielectric layer between the monosilicon emitter region and the polysilicon emitter-contact body. This method contributes to a reduction of base-current density and thereby to a further increase of the forward current gain compared to the case of the absence of this layer. The thicker layer leads to higher values of the gain. If the layer is not thin enough, the minority carriers in the emitter region are blocked at the interface, i.e. the corresponding value of F.sub.2 becomes quite close to zero. However, insufficiently thin layers block not only minority carriers but also majority carriers in the emitter region and thereby increase the total emitter resistance. The resistance problem is sometimes so sharp that special techniques are developed to breakup the interfacial dielectric layer that, to some extent, means a returning to the above "layerless" structure. The reason is that flow F.sub.2 should not be forced to reach zero. This circumstance limits the prospects to achieve extremely high values of the forward current gain within the polysilicon-emitter-contact approach.
The above considerations can also be applied to semiconductor bipolar transistor in common-collector configuration. To do that, one should only replace word "emitter" with word "collector" and vice versa.
The present invention is based on a qualitatively different idea. As noted above, the emitter-region minority carriers are injected from the base region (flow F.sub.1) and flow through the emitter region to the emitter contact (flow F.sub.2). The present invention proposes the method which provides the opposite direction of flow F.sub.2. In this case, the minority carriers are injected into the emitter region not only from the base region to the emitter-region surface which is opposite to the emitter-base interface but also from the above surface to this interface. It can be shown that this counter-injection provides higher values of forward current gain of the transistor than any version of the polysilicon emitter contact.


SUMMARY OF THE PRESENT INVENTION

The object of the present invention is to provide an extra semiconductor structure for semiconductor bipolar transistors which, being included in a transistor, provides the following advantages: and normal-operating conditions without a noticeable deterioration of transient properties of the device compared to existing bipolar technologies, standard commercial silicon homojunction or silicon-based heterojunction processes, and cryogenic temperatures.
Any semiconductor bipolar transistor usually includes at least one collector region, at least one base region, and at least one emitter region. All the collector and emitter regions have the same type of conductivity whereas all the base regions have the opposite type of conductivity. The above-mentioned objects may be achieved by providing a semiconductor bipolar transistor w

REFERENCES:
patent: 4814852 (1989-03-01), Sundstrom
patent: 4843448 (1989-06-01), Garcia et al.
patent: 5032887 (1991-07-01), Oliveri et al.
patent: 5412328 (1995-05-01), Male et al.
patent: 5481132 (1996-01-01), Moreau
Murphy et al., "Transistor-Transistor Logic with High Packing Density and Optimum Performance at High Inverse Gain", Session IV: Large-Scale Integration, ISSCC, International Solid-State Circuits Conference (Philadelphia, PA 1968), Digest of Technical Papers, Feb. 1968, pp. 002-003.

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