High electron mobility transistor with mesa structure and...

Details High electron mobility transistor with mesa structure and... High electron mobility transistor with mesa structure and...

2005-01-24

2009-10-27

Landau, Matthew C (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S192000

Reexamination Certificate

active

07608864

ABSTRACT:
The semiconductor device (10) comprises a semiinsulating substrate (12), a layered structure (20) of compound semiconductor which is a mesa structure (18) and contains an active channel layer (14), a first and a second metal main electrodes (22a, 22b) which are provided on the layered structure (20), a first and a second ion implantation regions (40a, 40b) which are provided at the depth level below the active channel layer, and a metal control electrode (26) which is provided along the channel width direction from the first ion implantation region to the second ion implantation region, crossing over the upper side of the active channel layer.

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patent: 63017563 (1988-01-01), None
patent: 08-279520 (1996-10-01), None
SandeepR. Bahl et al.,Elimination of Mesa-Sidewall Gate Leakage in InAlAs/InGaAs Heterostructuressby Selective Sidewall Recessing, IEEE Electron Device Letters vol. 13 No. 4. Apr. 1992.
A.Fathimulla ettal., High-Performance InAlAs/InGaAs HEMT's and MESFET's IEEE Electron Device Letters, vol. 9, No. 7, Jul. 1988.
April S. Brown et al., Low-Temperature Buffer AlInAs/GaInAs on InP HEMT Technology for Ultra-High-Speed Integrated Circuits, Hughes Research Laboratories, malibu, CA.

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