High efficiency power amplifier circuit

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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Details

330288, 330296, 330298, H03F 345

Patent

active

041224019

ABSTRACT:
The invention described herein is essentially a single ended power amplifier circuit properly biased to avoid crossover distortion and comprising in its output stage an NPN power transistor connected between a positive voltage source and a load. The base of the NPN transistor is connected to the collector of a PNP power transistor whose emitter is also connected to the positive voltage source. The parallel NPN/PNP transistor composite arrangement is a major feature in the power amplifier circuit resulting in a reasonably low quiescent current, low distortion, inherent stability, and ease in biasing. The composite combination of the PNP/NPN output transistors are driven by a single high Beta NPN input transistor driving the base of the PNP output transistor through a diode connected PNP transistor with unity current gain. The PNP output transistor drives the base terminal of the NPN output transistor. An alternate embodiment is disclosed which utilizes two overload protective transistors.

REFERENCES:
patent: 3992678 (1976-11-01), Suzuki
patent: 4021701 (1977-05-01), Davies
Ahmed, "Zero-Offset Potential Follower Circuits", RCA Technical Notes TN No. 938, Sep. 17, 1973, 7 sheets.

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