High efficiency pattern sequence controller for automatic test e

Details High efficiency pattern sequence controller for automatic test e High efficiency pattern sequence controller for automatic test e

1989-09-28

1992-09-29

Baker, Stephen M.

Excavating

G06F 1100, G06F 940

Patent

active

051519038

ABSTRACT:
A pattern sequence control system utilizing a control RAM to provide pattern control information only when a change in pattern sequence control is required, thereby significantly reducing the amount of pattern control memory required. The pattern sequence control system utilizes a single pattern address counter for sequential patterns and a single loop address counter for looping pattern. The pattern address counter and loop address counter provide the pattern memory address for all pattern memory regardless of the number of tester channels. A cycle counter determines the number of test cycles that a sequential pattern or repeating pattern will be applied. A loop length counter and loop counter are used to control pattern looping.

REFERENCES:
patent: 4682330 (1987-07-01), Millham
patent: 4792892 (1988-12-01), Mary et al.
patent: 4797886 (1989-01-01), Imada

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