High dynamic range analog to digital converter architecture

Details High dynamic range analog to digital converter architecture High dynamic range analog to digital converter architecture

2007-08-07

2007-08-07

Nguyen, Linh (Department: 2819)

Coded data generation or conversion

Converter calibration or testing

C341S118000, C341S155000

Reexamination Certificate

active

11357553

ABSTRACT:
An analog-to-digital converter (“ADC”) architecture as described herein utilizes a digital signal processor having suitably configured waveform prediction logic that can predict expected types of input signals. The ADC architecture subtracts the predictable signal components from the analog input signal prior to the analog-to-digital conversion, which extends the dynamic range of the ADC employed by the ADC architecture. In practice, the ADC architecture can subtract predictable strong signal components from an analog input signal such that the ADC can apply its available dynamic range to the remaining weak signal components.

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