High dynamic linearity current-mode digital-to-analog...

Details High dynamic linearity current-mode digital-to-analog... High dynamic linearity current-mode digital-to-analog...

2005-06-14

2005-06-14

Jeanglaude, Jean Bruner (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S153000

Reexamination Certificate

active

06906652

ABSTRACT:
The present invention dramatically reduces dynamic mismatches between the different current segments of a segmented current-mode DAC. By providing substantially the same local architecture for each of the individual current segments, parasitic effects of any physical realization can be controlled. In one embodiment, the most-significant-bit (MSB) current segments and the least-significant-bit (LSB) current segments each have the same number of multiple internal current branches. In the MSB segments, the multiple internal current branches are combined at a source node; whereas, in the LSB segment, a portion of the segment current is dumped, or wasted, through at least some of the internal current branches.

REFERENCES:
patent: 5568145 (1996-10-01), Reynolds
patent: 5781140 (1998-07-01), Kao
patent: 6424283 (2002-07-01), Bugeja et al.
patent: 6448917 (2002-09-01), Leung et al.
patent: 6621439 (2003-09-01), Bugeja
patent: 6650265 (2003-11-01), Bugeja
patent: 6741195 (2004-05-01), Cho

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