High dopant concentration diffused resistor and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S528000, C257S529000, C257S380000, C257S581000, C257S516000, C257S539000, C257S379000, C438S210000, C438S238000, C438S382000, C438S383000, C438S384000, C438S385000, C438S190000

Reexamination Certificate

active

06690082

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to integrated circuits and, more specifically, to a high dopant concentration diffused resistor, a method of manufacture therefor, and an integrated circuit including the same.
BACKGROUND OF THE INVENTION
Over the last several decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. Accordingly, a large variety of semiconductor devices having various applicability and numerous disciplines have been manufactured. One such silicon-based semiconductor device that has gained wide use, is the complementary metal oxide semiconductor (CMOS).
Frequently, CMOS devices are complemented by other devices, such as resistors. For instance, resistors are regularly required in analog CMOS and bipolar CMOS (BiCMOS) semiconductor devices to reduce current spikes associated with such devices. Presently, three broad categories of resistors exist: interconnect resistors, polysilicon resistors, and diffused resistors. Of importance when designing the resistors is precision, resistance values obtainable, low to no voltage dependence and decreased parasitic capacitance. Of the three broad categories of precision resistors, however, only the diffused resistors are consistently capable of providing the precision and resistance values required in today's integrated circuits. For this reason, interconnect resistors and polysilicon resistors are sparingly used.
Diffused resistors are also commonly broken into three categories: n-well diffused resistors, n+ diffused resistors and p+ diffused resistors, wherein the n+ diffused resistors and p+ diffused resistors are often collectively called high dopant concentration diffused resistors. Of the diffused resistors, the n-well diffused resistor is the most problematic. Many of the problems associated with the n-well diffused resistors may be ascribed to these resistors being highly voltage dependent. For this reason, n-well diffused resistors are the least desirable of the diffused resistors.
Turning to Prior Art
FIG. 1
, illustrated is a conventional p+ diffused resistor
100
as is currently used in the art. As is shown, the conventional p+ diffused resistor
100
includes a conventional n-well
120
formed within a semiconductor substrate
110
. As is further illustrated, a p+ resistor region
130
is formed within the n-well
120
, wherein the p+ resistor region
130
has contacts
140
contacting either side thereof.
Turning to Prior Art
FIG. 2
, illustrated is a conventional n+ diffused resistor
200
as is currently used in the art. The n+ diffused resistor
200
, in comparison to the p+ diffused resistor
100
, does not include the n-well
120
(FIG.
1
), but its n+ resistor region
220
is formed directly in its semiconductor substrate
210
. Because the semiconductor substrate
210
is p-type doped, the n+ resistor region
220
is sufficiently isolated without using the n-well
120
(FIG.
1
).
While both the p+ and n+ diffused resistors
100
,
200
, are much more desirable than the standard n-well diffused resistor (and especially the interconnect resistors and polysilicon resistors), they do have certain drawbacks. For example, it has been observed that the p+ and n+ diffused resistors
100
,
200
, do not function as accurately and precisely as required for many of the high frequency devices being manufactured today. More specifically, it has been observed that the bandwidth of the high frequency devices is limited by certain features of the diffused resistors, mainly capacitances that form at the junction between the n-well
120
and the p+ resistor region
130
, and the semiconductor substrate
210
and n+ resistor region
220
, for the p+ diffused resistor
100
and n+ diffused resistor
200
, respectively.
Accordingly, what is needed in the art is a p+ or n+ diffused resistor that may be used in conjunction with higher frequency devices, and that does not experience the parasitic capacitance problems addressed above.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a high dopant concentration diffused resistor, a method of manufacture therefor, and an integrated circuit including the same. In one embodiment of the invention, the high dopant concentration diffused resistor includes a doped tub located over a semiconductor substrate and a doped resistor region located in the doped tub, the doped resistor region forming a junction within the doped tub. In a related embodiment, the high dopant concentration diffused resistor further includes first and second terminals each contacting the doped tub and the doped resistor region, wherein the first and second terminals cause the doped tub and doped resistor region to have a zero potential difference at any point across the junction when a voltage is applied to the first and second terminals. Often, this may be accomplished without adding additional processing steps.
In an alternative embodiment of the invention, the high dopant concentration diffused resistor includes a doped tub located over a semiconductor substrate and having a concentration of a first dopant, and a doped resistor region located in the doped tub and having a higher concentration of the first dopant. In a similar embodiment, the resistor further includes a first terminal contacting the doped resistor region at a first location and an opposing second terminal contacting the doped resistor region at a second location, wherein the similar dopant between the doped tub and doped resistor region cause them to have a zero potential difference at any point across a junction therebetween when a voltage is applied to the first and second terminals.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.


REFERENCES:
patent: 5661332 (1997-08-01), Nakamura et al.
patent: 6057204 (2000-05-01), Nowak et al.
patent: 6376881 (2002-04-01), Nagaya
patent: 4163960 (1992-06-01), None

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