Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-02-21
2006-02-21
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S237000, C438S275000, C438S691000, C438S710000
Reexamination Certificate
active
07001846
ABSTRACT:
A method for fabricating a high-density silicon-on-insulator (SOI) cross-point memory array and an array structure are provided. The method comprises: selectively forming a hard mask on an SOI substrate, defining memory areas, active device areas, and top electrode areas; etching to remove the exposed silicon (Si) surfaces; selectively forming metal sidewalls adjacent the hard mask; filling the memory areas with memory resistor material; removing the hard mask, exposing the underlying Si active device areas; forming an overlying layer of oxide; etching the oxide to form contact holes to the active device areas; forming diodes in the contact holes; and, forming bottom electrode lines overlying the diodes.
REFERENCES:
patent: 6518130 (2003-02-01), Ohno
patent: 6703304 (2004-03-01), Krivokapic
patent: 6720229 (2004-04-01), Norstrom et al.
patent: 6859382 (2005-02-01), Rinerson et al.
Ripma David C.
Sharp Laboratories of America Inc.
Vinh Lan
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